Methods of Forming Field Effect Transistors, Methods of Forming Field Effect Transistor Gates, Methods of Forming Integrated Circuitry Comprising a Transistor Gate Array and Circuitry Peripheral to the Gate Array, and Methods of Forming Integrated Circuitry Comprising a Transistor Gate Array Including First Gates and Second Grounded Isolation Gates
First Claim
1. A method of forming a field effect transistor, comprising:
- forming masking material over semiconductive material of a substrate;
forming a trench through the masking material and into the semiconductive material;
forming gate dielectric material within the trench in the semiconductive material;
depositing gate material within the trench in the masking material and within the trench in the semiconductive material over the gate dielectric material;
recessing the gate material to have a planar outermost surface received within the trench in the masking material, the planar outermost surface spanning completely across the trench in the masking material; and
forming source/drain regions.
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Accused Products
Abstract
The invention includes methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates. In one implementation, a method of forming a field effect transistor includes forming masking material over semiconductive material of a substrate. A trench is formed through the masking material and into the semiconductive material. Gate dielectric material is formed within the trench in the semiconductive material. Gate material is deposited within the trench in the masking material and within the trench in the semiconductive material over the gate dielectric material. Source/drain regions are formed. Other aspects and implementations are contemplated.
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Citations
105 Claims
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1. A method of forming a field effect transistor, comprising:
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forming masking material over semiconductive material of a substrate; forming a trench through the masking material and into the semiconductive material; forming gate dielectric material within the trench in the semiconductive material; depositing gate material within the trench in the masking material and within the trench in the semiconductive material over the gate dielectric material; recessing the gate material to have a planar outermost surface received within the trench in the masking material, the planar outermost surface spanning completely across the trench in the masking material; and forming source/drain regions. - View Dependent Claims (4, 5, 7, 8, 9)
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2-3. -3. (canceled)
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6. (canceled)
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10-33. -33. (canceled)
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34. A method of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, comprising:
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forming masking material over semiconductive material of a substrate; forming array circuitry trenches through the masking material and into the semiconductive material; depositing array gate material within the array circuitry trenches in the masking material and within the array circuitry trenches in the semiconductive material; after depositing the array gate material, forming peripheral circuitry trenches through the masking material; depositing peripheral circuitry gate material within the peripheral circuitry trenches within the masking material; the array circuitry trenches being formed using a masking step, and further comprising forming grounded gate trenches through the masking material in the array in the same masking step in which the array circuitry trenches are formed, the grounded gate trenches being formed into trench isolation material received within the substrate semiconductive material.
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36-84. -84. (canceled)
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85. A method of forming a field effect transistor, comprising:
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forming masking material over semiconductive material of a substrate, the masking material having a thickness expanse over the semiconductive material; forming a trench through the masking material and into the semiconductive material; forming gate dielectric material within the trench in the semiconductive material; depositing gate material within the trench in the masking material and within the trench in the semiconductive material over the gate dielectric material; recessing the gate material to have an outermost surface spanning completely across the trench in the masking material and that is everywhere received within the trench within the thickness expanse of the masking material and everywhere outward of the semiconductive material into which the trench was formed; and forming source/drain regions. - View Dependent Claims (86)
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87. A method of forming a field effect transistor, comprising:
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forming masking material over semiconductive material of a substrate; forming a trench through the masking material and into the semiconductive material; forming gate dielectric material within the trench in the semiconductive material; providing gate material within the trench in the masking material and within the trench in the semiconductive material over the gate dielectric material; exposing sidewalls of the gate material outward of the semiconductive material; forming insulative material over the sidewalls of the gate material outward of the semiconductive material; anisotropically etching the insulative material to form insulative sidewall spacers over the sidewalls of the gate material outward of the semiconductive material; and forming source/drain regions. - View Dependent Claims (88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98)
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99. A method of forming a field effect transistor, comprising:
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providing gate material within and projecting outwardly of a trench in semiconductive material, the projecting gate material comprising opposing sidewalls outward of the semiconductive material; providing gate dielectric over the gate material that is within the semiconductive material; forming insulative material over the sidewalls of the gate material outward of the semiconductive material; anisotropically etching the insulative material to form insulative sidewall spacers over the sidewalls of the gate material outward of the semiconductive material; and forming source/drain regions. - View Dependent Claims (100, 101, 102)
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103. A method of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, comprising:
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forming masking material over semiconductive material of a substrate; in a first masking step, forming array circuitry trenches through the masking material and into the semiconductive material and forming a first peripheral circuitry trench through the masking material; depositing first gate material within the array circuitry trenches and the first peripheral circuitry trench; in a second masking step, forming a grounded gate trench through the first gate material and the masking material within array area and forming a second peripheral circuitry trench through the first gate material and the masking material within area peripheral to the array area; and depositing second gate material within the grounded gate trench and within the second peripheral circuitry trench.
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104. A method of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, comprising:
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forming masking material over semiconductive material of a substrate; in a first masking step, forming array circuitry trenches through the masking material and into the semiconductive material; depositing first gate material within the array circuitry trenches; in a second masking step, forming a grounded gate trench through the first gate material and the masking material within array area and forming a first peripheral circuitry trench through the first gate material and the masking material within area peripheral to the array area; depositing second gate material within the grounded gate trench and within the first peripheral circuitry trench; in a third masking step, forming a second peripheral circuitry trench through the second gate material and through the first gate material within the peripheral area; and depositing third gate material within the second peripheral circuitry trench. - View Dependent Claims (105)
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Specification