INTERFACE FOR A MULTI-PROCESSOR GATEWAY APPARATUS AND METHOD FOR USING THE SAME

• US 20110126133A1
• Filed: 11/20/2009
• Published: 05/26/2011
• Est. Priority Date: 11/20/2009
• Status: Active Grant

• Current Assignee: Time Warner Cable Enterprises LLC (Charter Communications Incorporated)
• Original Assignee: Time Warner Cable Enterprises LLC (Charter Communications Incorporated)
• Inventors: Markley, Jeffrey Paul
• Granted Patent: US 8,301,716 B2
• Time in Patent Office: Days
• US Class Current: 715/760
• CPC Class Codes: G06F 9/54 Interprogram communication

Abstract

An interface for a multi-processor gateway apparatus and method for using the same. A user device communicates with a multi-processor gateway apparatus over a wired or wireless path. A first processor within the multi-processor gateway apparatus provides the user device a user interface. The user interface allows the user to select a function that is managed by one of the multiple processors. If the selected function is assigned to the first processor, the function is performed by the first. However, if the selected function is performed by one of the other processors, the first processor executes calls to an API layer associated with the processor assigned to perform the requested function. The requested function is performed by the processor to which it is assigned and the results reported to the first processor. The first processor then provides the results of the request to the user device via the path.

Claims

1. An interface for a multi-processor gateway apparatus comprising:

a first processor of the multi-processor gateway apparatus; and

a second processor of the multi-processor gateway apparatus, wherein the second processor comprises an API layer,

wherein the first processor is configured with executable software instructions that cause the first processor to perform operations comprising;

serving a user interface to a user device connected to the multi-processor gateway apparatus via a path, wherein the user interface presents selectable functions to be performed by the multi-processor gateway apparatus;

receiving an instruction from the user device to perform a selected function;

determining whether the selected function is to be performed by the first processor or the second processor; and

when the selected function is to be performed by the first processor;

executing the instruction; and

sending a result of the execution of the instruction by the first processor to the user device;

when the selected function is to be performed by the second processor;

issuing an inter process communication call to the API layer of a second processor, wherein the second processor is configured with executable software instructions that cause the second processor to perform operations comprising executing the instruction;

receiving from the API layer of the second processor a result of the execution of the instruction by the second processor; and

sending the result of the execution of the instruction by the second processor to the user device.

2. The interface of claim 1, wherein the user device is selected from the group consisting of a desk top computer, a laptop computer, a PDA, a set-top box, and a smart phone.

3. The interface of claim 1, wherein the path is selected from the group consisting of a wired path and a wireless path.

4. The interface of claim 1, wherein the user device comprises a browser and wherein the software executable instruction for serving a user interface to a user device comprises software executable instructions for:

operating a web server;

generating a web page; and

sending the web page to the browser operated by the user device.

5. The interface of claim 1, wherein the first and second processors are selected from the group consisting of a digital signal processor, a reduced instruction set processor, a general-purpose processor, a microprocessor, a gate array, a PLD, a reconfigurable compute fabric, an array processor, an application-specific integrated circuit (ASIC), and a logical processor.

6. The interface of claim 1, wherein the first and second processors are contained on a single unitary IC die.

7. The interface of claim 1, wherein the first and second processors are distributed across multiple components.

8. The interface of claim 1, wherein the multi-processor gateway apparatus is a content distribution apparatus.

9. The interface of claim 1, wherein the selected function is selected from the group consisting of configuring a router address, configuring an IP range, configuring a port identifier, configuring a filter identifier, configuring a voice system and sharing content on the user device with another user device connected to the multi-processor gateway apparatus.

10. The interface of claim 9, wherein the content is selected from the group consisting of a video file, an audio file, a text file, a document file, and an image file.

11. A method for interfacing to a multi-processor gateway apparatus comprising:

serving a user interface to a user device from a first processor, wherein the user device is connected to the multi-processor gateway apparatus via a path and wherein the user interface presents selectable functions to be performed by the multi-processor gateway apparatus;

receiving an instruction from the user device to perform a selected function;

determining at the first processor whether the selected function is to be performed by the first processor or by a second processor of the multi-processor gateway apparatus, wherein the second processor comprises an API layer; and

when the selected function is to be performed by the first processor;

executing the instruction at the first processor; and

sending a result of the execution of the instruction by the first processor to the user device;

when the selected function is to be performed by the second processor;

issuing an inter process communication call from the first processor to the API layer of the second processor;

executing the instruction at the second processor;

receiving at the first processor a result from the API layer of the second processor; and

sending the result of the execution of the instruction by the second processor to the user device.

12. The method of claim 11, wherein the user device is selected from the group consisting of a desk top computer, a laptop computer, a PDA, a set-top box, and a smart phone.

13. The method of claim 11, wherein the path is selected from the group consisting of a wired path and a wireless path.

14. The method of claim 11, the user device comprises a browser and wherein the method further comprises:

operating a web server;

generating a web page; and

sending the web page to the browser operated by the user device.

15. The method of claim 11, wherein the first and second processors are selected from the group consisting of a digital signal processor, a reduced instruction set processor, a general-purpose processor, a microprocessor, a gate array, a PLD, a reconfigurable compute fabric, an array processor, an application-specific integrated circuit (ASIC), and a logical processor.

16. The method of claim 11, wherein the first and second processors are contained on a single unitary IC die.

17. The method of claim 11, wherein the first and second processors are distributed across multiple components.

18. The method of claim 11, wherein the multi-processor gateway apparatus is a content distribution apparatus.

19. The method of claim 11, wherein the selected function is selected from the group consisting of configuring a router address, configuring an IP range, configuring a port identifier, configuring a filter identifier, configuring a voice system and sharing content on the user device with another user device connected to the multi-processor gateway apparatus.

20. The method of claim 19, wherein the content is selected from the group consisting of a video file, an audio file, a text file, a document file, and an image file.