METHOD AND SYSTEM FOR HANDLING MULTIPLE 3-D VIDEO FORMATS

• US 20110134211A1
• Filed: 12/08/2010
• Published: 06/09/2011
• Est. Priority Date: 12/08/2009
• Status: Abandoned Application

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Herrick, Jason, Neuman, Darren, Payson, Christopher, Zhao, Qinghua
• Application Number:
  US12/963,212
• Publication Number:
  US 20110134211A1
• Time in Patent Office: Days
• US Class Current: 348/42
• CPC Class Codes: H04N 13/139 Format conversion, e.g. of frame-rate or size
• CPC Class Codes: H04N 2213/007 Aspects relating to detection of stereoscopic image format, e.g. for adaptation to the display format

Abstract

Aspects of a method and system for handling multiple 3-D video formats are provided. A video processing system may receive one or more video frames comprising first 3-D view pixel data and second 3-D view pixel data suitable for generating a three-dimensional (3-D) video frame. The video system may be operable to determine an arrangement of the first 3-D view pixel data and the second view pixel data in the one or more video frames. In instances that the determined arrangement is not a desired arrangement, the video processing system may be operable to convert the one or more video frames to the desired arrangement. Either or both of the determined arrangement and the desired arrangement may comprise a series of two single-view frames. Either or both of the determined arrangement and the desired arrangement may comprise a single frame comprising the first 3-D view pixel data and the second 3-D view pixel data.

Claims

1. A method comprising:

in a video processing device;

receiving one or more video frames, said received one or more frames comprising first 3-D view pixel data and second 3-D view pixel data for generating a three-dimensional (3-D) video frame;

determining an arrangement of said first 3-D view pixel data and said second 3-D view pixel data in said one or more video frames; and

in instances that said determined arrangement is not a desired arrangement, converting said one or more video frames to said desired arrangement.

2. The method of claim 1, wherein:

one of said determined arrangement and said desired arrangement comprises a series of two single-view frames, each of said single-view frames comprising one of said first 3-D view pixel data and said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement comprises a single frame, said single frame comprising said first 3-D view pixel data and said second 3-D view pixel data.

3. The method of claim 2, wherein said single frame is arranged such that a left portion of said single frame comprises said first 3-D view pixel data and a right portion of said single frame comprises said second 3-D view pixel data.

4. The method of claim 2, wherein said single frame is arranged such that a top portion of said single frame comprises said first 3-D view pixel data and a bottom portion of said single frame comprises said second 3-D view pixel data.

5. The method of claim 1, wherein:

one of said determined arrangement and said desired arrangement comprises a left-right single frame, a left portion of said left-right single frame comprising said first 3-D view pixel data and a right portion of said left-right single frame comprising said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement comprises an over-under single frame, a top portion of said over-under single frame comprising said first 3-D view pixel data and a bottom portion of said over-under single frame comprising said second 3-D view pixel data.

6. The method of claim 1, wherein:

one of said determined arrangement and said desired arrangement comprises an interleaved single frame, said interleaved single frame comprising said first 3-D view pixel data interleaved with said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement comprises a left-right single frame, a left portion of said left-right single frame comprising said first 3-D view pixel data and a right portion of said left-right single frame comprising said second 3-D view pixel data.

7. The method of claim 1, wherein:

one of said determined arrangement and said desired arrangement corresponds to an interleaved single frame, said interleaved single frame comprising said first 3-D view pixel data interleaved with said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement corresponds to a over-under single frame, a top portion of said over-under single frame comprising said first 3-D view pixel data and a bottom portion of said over-under single frame comprises said second 3-D view pixel data.

8. The method of claim 1:

wherein said converting comprises;

writing said first 3-D view pixel data to one or more locations in memory identified by a first one or more pointers;

writing said second 3-D view pixel data to one or more locations in memory identified by a second one or more pointers; and

reading said first 3-D view pixel data and said second 3-D view pixel data from memory in an order that is different than an order in which said first 3-D view pixel data and said second 3-D view pixel data was written to memory.

9. The method according to claim 1, comprising receiving said first 3-D view pixel data and second 3-D view pixel data via:

a first switching element that is operable to convey pixel data onto one or more of a plurality of data paths; and

a second switching element that is operable to convey pixel data from said plurality of data paths to memory, to said first switching element, and to a compositor.

10. The method according to claim 9, comprising selecting which one or more of said data paths onto which said pixel data for 3-D left view and said pixel data 3-D right view is conveyed based on said determined arrangement and said desired arrangement.

11. A system comprising:

one or more circuits for use in a video processing system, said one or more circuits being operable to;

receive one or more video frames, said one or more frames comprising first 3-D view pixel data and second 3-D view pixel data suitable for generating a three-dimensional (3-D) video frame;

determine an arrangement of said first 3-D view pixel data and said second view pixel data in said one or more video frames; and

in instances that said determined arrangement is not a desired arrangement, convert said one or more video frames to said desired arrangement.

12. The system of claim 11, wherein:

one of said determined arrangement and said desired arrangement comprises a series of two single-view frames, each of said single-view frames comprising one of said first 3-D view pixel data and said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement comprises a single frame, said single frame comprising said first 3-D view pixel data and said second 3-D view pixel data.

13. The system of claim 12, wherein said single frame is arranged such that a left portion of said single frame comprises said first 3-D view pixel data and a right portion of said single frame comprises said second 3-D view pixel data.

14. The system of claim 12, wherein said single frame is arranged such that a top portion of said single frame comprises said first 3-D view pixel data and a bottom portion of said single frame comprises said second 3-D view pixel data.

15. The system of claim 11, wherein:

one of said determined arrangement and said desired arrangement comprises a left-right single frame, a left portion of said left-right single frame comprising said first 3-D view pixel data and a right portion of said left-right single frame comprising said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement comprises an over-under single frame, a top portion of said over-under single frame comprising said first 3-D view pixel data and a bottom portion of said over-under single frame comprising said second 3-D view pixel data.

16. The system of claim 11, wherein:

one of said determined arrangement and said desired arrangement comprises an interleaved single frame, said interleaved single frame comprising said first 3-D view pixel data interleaved with said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement comprises a left-right single frame, a left portion of said left-right single frame comprising said first 3-D view pixel data and a right portion of said left-right single frame comprising said second 3-D view pixel data.

17. The system of claim 11, wherein:

one of said determined arrangement and said desired arrangement corresponds to an interleaved single frame, said interleaved single frame comprising said first 3-D view pixel data interleaved with said second 3-D view pixel data; and

one of said determined arrangement and said desired arrangement corresponds to a over-under single frame, a top portion of said over-under single frame comprising said first 3-D view pixel data and a bottom portion of said over-under single frame comprises said second 3-D view pixel data.

18. The system of claim 11:

wherein said converting comprises;

writing said first 3-D view pixel data to one or more locations in memory identified by a first one or more pointers;

writing said second 3-D view pixel data to one or more locations in memory identified by a second one or more pointers;

reading said first 3-D view pixel data and said second 3-D view pixel data from memory in an order that is different than an order in which said first 3-D view pixel data and said second 3-D view pixel data was written to memory.

19. The system according to claim 11, wherein said one or more circuits are operable to receive said first 3-D view pixel data and second 3-D view pixel data via:

a first switching element that is operable to convey pixel data onto one or more of a plurality of data paths;

a second switching element that is operable to convey pixel data from said plurality of data paths to;

memory, to said first switching element, and to a compositor.

20. The system according to claim 19, wherein said one or more circuits are operable to select which one or more of said data paths onto which said left-view pixel data and said right-view pixel data is conveyed based on said determined arrangement and said desired arrangement.