METHOD OF FORMING AN INSULATED GATE FIELD EFFECT TRANSISTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE
First Claim
1. A method of forming a semiconductor device comprising the steps of:
- providing a semiconductor substrate having a major surface;
forming a dielectric stack overlying the major surface, wherein the dielectric stack comprises at least two layers of different material, and wherein the dielectric stack has a first surface;
forming first openings in the dielectric stack;
forming trenches in the semiconductor substrate through the first openings to a first depth;
forming insulated shield electrodes in lower portions of the trenches;
forming insulated gate electrodes in the trenches above the insulated shield electrodes, wherein the insulated gate electrodes comprise a conductive gate material having upper surfaces in proximity to the first surface;
removing at least portions of the dielectric stack thereby leaving portions of the conductive gate material extending above the major surface;
forming first spacers adjacent to the portions of the conductive gate material, wherein segments of the major surface are exposed between adjacent trenches;
removing portions of conductive gate material and portions of the semiconductor substrate self-aligned to the first spacers, wherein the removing step forms first recessed portions overlying the conductive gate material, and second recessed portions within the semiconductor substrate;
forming second spacers in the first and second recessed portions;
forming enhancement regions in the first and second recessed portions self-aligned to the second spacers;
forming insulating regions overlying the first recessed portions; and
forming a first conductive layer coupled to the semiconductor substrate through the second recessed portions.
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Accused Products
Abstract
In one embodiment, a method for forming a transistor having insulated gate electrodes and insulated shield electrodes within trench regions includes forming disposable dielectric stack overlying a substrate. The method also includes forming the trench regions adjacent to the disposable dielectric stack. After the insulated gate electrodes are formed, the method includes removing the disposable dielectric stack, and then forming spacers adjacent the insulated gate electrodes. The method further includes using the spacers to form recessed regions in the insulated gate electrodes and the substrate, and then forming enhancement regions in the first and second recessed regions.
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Citations
22 Claims
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1. A method of forming a semiconductor device comprising the steps of:
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providing a semiconductor substrate having a major surface; forming a dielectric stack overlying the major surface, wherein the dielectric stack comprises at least two layers of different material, and wherein the dielectric stack has a first surface; forming first openings in the dielectric stack; forming trenches in the semiconductor substrate through the first openings to a first depth; forming insulated shield electrodes in lower portions of the trenches; forming insulated gate electrodes in the trenches above the insulated shield electrodes, wherein the insulated gate electrodes comprise a conductive gate material having upper surfaces in proximity to the first surface; removing at least portions of the dielectric stack thereby leaving portions of the conductive gate material extending above the major surface; forming first spacers adjacent to the portions of the conductive gate material, wherein segments of the major surface are exposed between adjacent trenches; removing portions of conductive gate material and portions of the semiconductor substrate self-aligned to the first spacers, wherein the removing step forms first recessed portions overlying the conductive gate material, and second recessed portions within the semiconductor substrate; forming second spacers in the first and second recessed portions; forming enhancement regions in the first and second recessed portions self-aligned to the second spacers; forming insulating regions overlying the first recessed portions; and forming a first conductive layer coupled to the semiconductor substrate through the second recessed portions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method for forming a semiconductor device comprising the steps of:
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providing a semiconductor substrate having a major surface, a pair of adjacent trenches, and a dielectric stack overlying the major surface between the pair of adjacent trenches, wherein each trench includes an insulated gate electrode portion including a gate electrode layer formed with first surface in proximity to an upper surface of the dielectric stack; removing the dielectric stack along side surfaces of the insulated gate electrode above the major surface; forming first spacers adjacent the side surfaces; removing a portion of the gate electrode layer adjacent the first spacers to form a first recessed portion; removing a portion of the semiconductor substrate to form a second recessed portion self-aligned to the first spacers; and forming enhancement regions within the first and second recessed portions. - View Dependent Claims (18, 19, 20)
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21. A method for forming a semiconductor device comprising the steps of:
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providing a semiconductor substrate having a major surface, a pair of adjacent trenches, and a dielectric stack overlying the major surface between the pair of adjacent trenches, wherein each trench includes an insulated gate electrode portion including a gate electrode layer and an insulated shield electrode portion underlying the insulated gate electrode portion; removing the dielectric stack along side surfaces of the insulated gate electrode above the major surface; forming first spacers adjacent the side surfaces; removing a portion of the gate electrode layer adjacent the first spacers to form a first recessed portion; removing a portion of the semiconductor substrate to form a second recessed portion self-aligned to the first spacers; forming second spacers within the first and second recessed portions and forming enhancement regions within the first and second recessed portions self-aligned to the second spacers. - View Dependent Claims (22)
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Specification