OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND ORGANIC ELECTROLUMINESCENT DEVICE INCLUDING THE SAME

• US 20110140095A1
• Filed: 08/31/2010
• Published: 06/16/2011
• Est. Priority Date: 12/15/2009
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: C/O Samsung Mobile Display Company Limited
• Inventors: Kim, Min-Kyu, Kim, Kwang-Suk
• Granted Patent: US 8,319,217 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor including: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode and exposed portions of the substrate; an oxide semiconductor layer formed on the gate insulating layer to correspond to the gate electrode, and comprising an HfInZnO-based oxide semiconductor, wherein the oxide semiconductor layer has a Zn concentration gradient; and source and drain regions respectively formed on both sides of the oxide semiconductor layer and the gate insulating layer.

Claims

1. A thin film transistor comprising:

a substrate;

a gate electrode formed on the substrate;

a gate insulating layer formed on the gate electrode and exposed portions of the substrate;

an oxide semiconductor layer formed on the gate insulating layer and comprising an HfInZnO-based oxide semiconductor, wherein the oxide semiconductor layer has a Zn concentration gradient; and

source and drain regions respectively formed on both sides of the oxide semiconductor layer and the gate insulating layer.

2. The thin film transistor of claim 1, wherein the concentration of Zn gradually increases towards an upper portion of the oxide semiconductor layer away from a lower portion of the oxide semiconductor layer.

3. The thin film transistor of claim 1, wherein the concentration of Zn in the oxide semiconductor layer is from about 30 to about 70 at % based on 100 at % of the total concentration of Hf, In, and Zn.

6. The thin film transistor of claim 1 or 4, wherein the concentration of Hf in the oxide semiconductor layer is from about 2 to about 13 at %.

7. The thin film transistor of claim 1, wherein the oxide semiconductor layer is amorphous.

8. The thin film transistor of claim 1, wherein the oxide semiconductor layer is crystalline.

9. The thin film transistor of claim 1, further comprising a buffer layer formed between the substrate and the gate electrode.

10. The thin film transistor of claim 1, further comprising an etch stop layer formed on the oxide semiconductor layer.

4. A thin film transistor comprising:

a substrate;

a gate electrode formed on the substrate;

a gate insulating layer formed on the gate electrode and exposed portions of the substrate;

an oxide semiconductor layer formed on the gate insulating layer comprising a first layer formed on the gate insulating layer and a second layer formed on the first layer, and comprising an HfInZnO-based oxide semiconductor, wherein the concentration of Zn is higher in the second layer than in the first layer; and

source and drain regions respectively formed on both sides of the oxide semiconductor layer and the gate insulating layer.

5. The thin film transistor of claim 4, wherein the concentration of Zn in the first layer is from about 30 to about 70 at %, and the concentration of Zn in the second layer is from about 35 to about 70 at %.

11. The thin film transistor of claim 4, wherein the oxide semiconductor layer is amorphous.

12. The thin film transistor of claim 4, wherein the oxide semiconductor layer is crystalline.

13. The thin film transistor of claim 4, further comprising a buffer layer formed between the substrate and the gate electrode.

14. The thin film transistor of claim 4, further comprising an etch stop layer formed on the oxide semiconductor layer.

15. A method of manufacturing a thin film transistor, the method comprising:

forming a gate electrode on a substrate;

forming a gate insulating layer on the gate electrode and exposed portions of the substrate;

forming an HfInZnO-based oxide semiconductor layer having a Zn concentration gradient on the gate insulating layer; and

forming source and drain regions respectively extending on both sides of the oxide semiconductor layer and the gate insulating layer.

16. The method of claim 15, wherein the forming of the oxide semiconductor layer is performed by co-sputtering by respectively applying powers to three targets of HfO₂, In₂O₃, and ZnO.

17. The method of claim 15, wherein the forming of the oxide semiconductor layer is performed in such a way that the concentration of Zn gradually increases towards an upper portion of the oxide semiconductor layer away from a lower portion of the oxide semiconductor layer.

18. The method of claim 15, wherein the forming of the oxide semiconductor layer is performed in such a way that the concentration of Zn in the oxide semiconductor layer is from about 30 to about 70 at %.

21. The method of claim 15, wherein the oxide semiconductor layer is amorphous.

22. The method of claim 15, wherein the oxide semiconductor layer is crystalline.

23. The method of claim 15, further comprising forming a buffer layer between the substrate and the gate electrode.

24. The method of claim 15, further comprising forming an etch stop layer on the oxide semiconductor layer.

19. A method of manufacturing a thin film transistor, the method comprising:

forming a gate electrode on a substrate;

forming a gate insulating layer on the gate electrode and exposed portions of the substrate;

forming an HfInZnO-based oxide semiconductor layer comprising a first layer formed on the gate insulating layer and a second layer formed on the first layer, wherein the concentration of Zn is higher in the second layer than in the first layer; and

forming source and drain regions extending on both sides of the oxide semiconductor layer and the gate insulating layer.

20. The method of claim 19, wherein the forming of the oxide semiconductor layer is performed in such a way that the concentration of Zn in the first layer is from about 30 to about 70 at %, and the concentration of Zn in the second layer is from about 35 to about 70 at %.

25. The method of claim 19, wherein the oxide semiconductor layer is amorphous.

26. The method of claim 19, wherein the oxide semiconductor layer is crystalline.

27. The method of claim 19, further comprising forming a buffer layer between the substrate and the gate electrode.

28. The method of claim 19, further comprising forming an etch stop layer on the oxide semiconductor layer.