SEMICONDUCTOR DEVICE HAVING DIODE CHARACTERISTIC

• US 20110140180A1
• Filed: 12/14/2010
• Published: 06/16/2011
• Est. Priority Date: 12/15/2009
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: KITAGAWA, Mitsuhiko
• Granted Patent: US 8,860,171 B2
• Time in Patent Office: Days
• US Class Current: 257/280
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0638 for preventing surface leakage due to surface inversion layer, e.g. with channel stopper channel stoppers in combination with isolation region for integrated circuits H01L21/762
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/41 characterised by their shape, relative sizes or dispositions
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7804 the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

According to one embodiment, a semiconductor device is provided. The semiconductor device has a first region formed of semiconductor and a second region formed of semiconductor which borders the first region. An electrode is formed to be in ohmic-connection with the first region. A third region is formed to sandwich the first region. A first potential difference is produced between the first and the second regions in a thermal equilibrium state, according to a second potential difference between the third region and the first region.

Claims

1. A semiconductor device comprising:

a first region formed of semiconductor;

a second region formed of semiconductor which borders the first region;

an electrode formed to be in ohmic-connection with the first region; and

a third region formed to sandwich the first region, wherein

a first potential difference is produced between the first and the second regions in a thermal equilibrium state, according to a second potential difference between the third region and the first region.

2. A semiconductor device comprising:

an anode electrode and a cathode electrode arranged with an interval provided between the electrodes;

a first-conductivity type cathode layer having a lower impurity concentration, the cathode layer being formed on the cathode electrode;

a first-conductivity type drift layer formed on the cathode layer, a portion of the drift layer on the anode electrode side having a plurality of trenches formed at intervals and having semiconductor regions, each of the semiconductor regions being located between ones of the trenches adjacent to each other;

a plurality of insulating films formed on inner walls of the trenches respectively;

a plurality of buried electrodes provided in the trenches, the buried electrodes and the inner walls of the trenches sandwiching the insulating films respectively; and

first-conductivity type layers and second-conductivity type layers provided between the semiconductor regions and the anode electrode and alternately, the first-conductivity type layers having a higher impurity concentration, the second-conductivity type layers having a higher impurity concentration.

3. The semiconductor device according to claim 2, wherein the buried electrodes are electrically connected to the anode electrode.

4. The semiconductor device according to claim 2, wherein the semiconductor region has an impurity concentration higher than that of a portion of the drift layer on the cathode electrode side.

5. The semiconductor device according to claim 2, wherein at least one of the semiconductor regions is a second conductivity type.

6. The semiconductor device according to claim 5, wherein the semiconductor regions includes a first-conductivity type semiconductor region and a second-conductivity type semiconductor region, ones of the buried electrodes arranged on both sides of the second-conductivity type semiconductor region is a gate of a MOSFET, the first-conductivity type semiconductor region is a portion of diode, and the MOSFET and the diode are electrically connected in reversely parallel.

7. The semiconductor device according to claim 2, wherein the buried electrodes are made of the same metal as that of the anode electrode.

8. The semiconductor device according to claim 2, wherein an insulating layer is buried in a portion of a space surrounded by each of the trenches and located on the anode electrode side, and the buried electrodes are provided in another portion of the space located on the cathode electrode side.

9. The semiconductor device according to claim 2, wherein

the potential φ

a of the semiconductor regions in a thermal equilibrium state is set by one of the conductivity type or the impurity concentration of the semiconductor regions, the material of the buried electrodes, the material of the insulating films, the interval between the trenches, or the voluntary combination, and

the difference between the potential φ

a and the potential φ

b of the drift layer in a thermal equilibrium state is lower than a built-in voltage which depends on a band gap of a semiconductor material constituting the drift layer, the first-conductivity type layer and the second-conductivity type layer.

10. The semiconductor device according to claim 2, wherein the semiconductor regions constitutes a passage of a current flowing from the anode electrode when the device is biased in a forward direction, and

the semiconductor regions are pinched off by depletion layers extending from the trenches on both sides of the semiconductor regions when the device is biased in a reverse direction.

11. A semiconductor device comprising:

an anode electrode and a cathode electrode arranged with an interval provided between the electrodes;

a first-conductivity type cathode layer formed on the cathode electrode;

a drift layer formed on the cathode layer, the drift layer having first layers of the first-conductivity type and second layers of a second-conductivity type arranged alternately in a direction in which the cathode layer extends; and

third layers of the first-conductivity type and fourth layers of the second-conductivity type provided between the drift layer and the anode electrode and arranged alternately, the third layers and fourth layers having impurity concentrations different from those of the first layers and the second layers, one ends of the third layers and fourth layers being formed on the first layers and the second layers so as to correspond to each position of the first layers and the second layers, the other ends of the third layers and fourth layers being formed on the anode electrode.

12. The semiconductor device according to claim 11, wherein the third layer and the fourth layer have impurity concentrations larger than those of the first layer and the second layer, respectively.

13. The semiconductor device according to claim 11, wherein the widths of the third layers in the arrangement direction are narrower than the widths of the fourth layers in the arrangement direction, and the widths of the first layers in the arrangement direction are substantially equal to the widths of the second layers in the arrangement direction.

14. The semiconductor device according to claim 11 wherein the widths of the third layers in the arrangement direction are substantially equal to the widths of the fourth layers in the arrangement direction,

the widths of portions of the first layers on the anode electrode side in the arrangement direction are smaller than the widths of portions of the second layers on the anode electrode side in the arrangement direction, and

the widths of portions of the first layers on the cathode electrode side in the arrangement direction are substantially equal to the widths of portions of the second layers on the cathode electrode side in the arrangement direction.

15. The semiconductor device according to claim 11 wherein a plurality of trenches are formed at intervals so as to extend from the third layers and the fourth layers into the drift layer, and a plurality of buried electrodes are formed in the trenches with oxide films interposed between the buried electrodes and the trenches.

16. The semiconductor device according to claim 15, wherein the anode electrode is formed on at least one of the buried electrodes.

17. The semiconductor device according to claim 15, wherein semiconductor regions exist respectively between ones of the trenches adjacent to each other, and a gate electrode is formed at least one of the buried electrodes provided in the adjacent trenches.

18. The semiconductor device according to claim 11, further comprising an insulating layer on which the cathode layer, the drift layer, the third layers, and the fourth layers are formed.

19. The semiconductor device according to claim 18, wherein the widths of the third layers in the arrangement direction are smaller than the width of the fourth layers in the arrangement direction, and

the widths of the first layers in the arrangement direction are substantially equal to the widths of the second layers in the arrangement direction.

20. The semiconductor device according to claim 19, wherein the widths of the third layers in the arrangement direction are substantially equal to the widths of the fourth layers in the arrangement direction,

the width of portions of the first layers on the anode electrode side in the arrangement direction is smaller than the widths of the second layers on the anode electrode side in the arrangement direction, and

the widths of the first layers on the cathode electrode side in the arrangement direction are substantially equal to the widths of the second layers on the cathode electrode side in the arrangement direction.