SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20110140205A1
• Filed: 12/10/2010
• Published: 06/16/2011
• Est. Priority Date: 12/11/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: IMOTO, Yuki, SAKATA, Junichiro, MARUYAMA, Tetsunori
• Granted Patent: US 9,196,738 B2
• Time in Patent Office: Days
• US Class Current: 257/411
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Many of the physical properties of a silicon semiconductor have already been understood, whereas many of the physical properties of an oxide semiconductor have been still unclear. In particular, an adverse effect of an impurity on an oxide semiconductor has been still unclear. In view of the above, a structure is disclosed in which an impurity that influences electrical characteristics of a semiconductor device including an oxide semiconductor layer is prevented or is eliminated. A semiconductor device which includes a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer and in which the nitrogen concentration in the oxide semiconductor layer is 1×10²⁰ atoms/cm³ or less is provided.

Claims

1. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer; and

a gate insulating layer formed between the gate electrode and the oxide semiconductor layer,

wherein a nitrogen concentration in the oxide semiconductor layer is 1×

10²⁰ atoms/cm³ or less.

2. The semiconductor device according to claim 1,

wherein the gate insulating layer is formed over the gate electrode.

3. The semiconductor device according to claim 1, further comprising a pair of contact electrodes,

wherein the pair of contact electrodes is formed over and is electrically connected to the oxide semiconductor layer.

4. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer; and

a gate insulating layer formed between the gate electrode and the oxide semiconductor layer,

wherein a nitrogen concentration in the oxide semiconductor layer is 1×

10²⁰ atoms/cm³ or less,

wherein a hydrogen concentration in the oxide semiconductor layer is 6×

10¹⁸ atoms/cm³ or less.

5. The semiconductor device according to claim 4,

wherein the gate insulating layer is formed over the gate electrode.

6. The semiconductor device according to claim 4, further comprising a pair of contact electrodes,

wherein the pair of contact electrodes is formed over and is electrically connected to the oxide semiconductor layer.

7. A semiconductor device comprising:

a gate electrode;

a gate insulating layer provided over the gate electrode;

an oxide semiconductor layer provided over the gate insulating layer;

a channel protective layer provided over the oxide semiconductor layer; and

a pair of contact electrodes provided over the oxide semiconductor layer and the channel protective layer,

wherein a nitrogen concentration in the oxide semiconductor layer is 1×

10²⁰ atoms/cm³ or less.

8. A semiconductor device comprising:

a gate electrode;

a gate insulating layer provided over the gate electrode;

an oxide semiconductor layer formed over the gate insulating layer;

a channel protective layer formed over the oxide semiconductor layer; and

a pair of contact electrodes formed over the oxide semiconductor layer and the channel protective layer,

wherein a nitrogen concentration in the oxide semiconductor layer is 1×

10²⁰ atoms/cm³ or less,

wherein a hydrogen concentration in the oxide semiconductor layer is 6×

10¹⁸ atoms/cm³ or less.

9. A method for manufacturing a semiconductor device comprising a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, the method comprising the step of:

performing heat treatment on the oxide semiconductor layer having a nitrogen concentration of 1×

10²⁰ atoms/cm³ or less at 350°

C. or higher for 1 hour or more.

10. A method for manufacturing a semiconductor device comprising a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, the method comprising the step of:

performing heat treatment on the oxide semiconductor layer having a nitrogen concentration of 1×

10²⁰ atmos/cm³ or less at 450°

C. or higher for 1 hour or more.

11. A method for manufacturing a semiconductor device comprising a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, the method comprising the step of:

performing heat treatment on the oxide semiconductor layer having a nitrogen concentration of 1×

10²⁰ atoms/cm³ or less at 550°

C. or higher for 1 hour or more.

12. A method for manufacturing a semiconductor device comprising a gate electrode, an oxide semiconductor layer, and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, the method comprising the step of:

performing heat treatment on the oxide semiconductor layer having a nitrogen concentration of 1×

10²⁰ atoms/cm³ or less at 650°

C. or higher for 3 minutes or more.