SWITCHING DEVICE FAILURE DETECTION SYSTEM AND METHOD FOR MULTILEVEL CONVERTERS
First Claim
1. A multilevel converter comprising:
- a plurality of phase legs each having at least two inner switching devices, at least two outer switching devices, at least two clamping diodes and a split DC link; and
a switching device failure detection circuit comprisinga logic module for each of the switching devices to generate a blocking state logic signal by comparing a switching device voltage and a threshold reference voltage;
a voltage calculation module to determine an expected voltage blocking state for each of the switching devices based on the gate drive signals of the switching devices and an output current direction;
a failure detection algorithm to detect a failure condition in any of the switching devices based on the blocking state logic signals and the expected voltage blocking states of the switching devices.
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Abstract
A multilevel converter includes a plurality of phase legs each having at least two inner switching devices, at least two outer switching devices, at least two clamping diodes, a split DC link and a switching device failure detection circuit. The switching device failure detection circuit includes a logic module for each of the switching devices, a voltage calculation module and a failure detection algorithm. The logic module generates a blocking state logic signal by comparing a switching device voltage and a threshold reference voltage and the voltage calculation module determines an expected voltage blocking state for each of the switching devices based on the gate drive signals of the switching devices and an output current direction. The failure detection algorithm detects a failure condition in any of the switching devices based on the blocking state logic signals and the expected voltage blocking states of the switching devices.
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Citations
19 Claims
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1. A multilevel converter comprising:
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a plurality of phase legs each having at least two inner switching devices, at least two outer switching devices, at least two clamping diodes and a split DC link; and a switching device failure detection circuit comprising a logic module for each of the switching devices to generate a blocking state logic signal by comparing a switching device voltage and a threshold reference voltage; a voltage calculation module to determine an expected voltage blocking state for each of the switching devices based on the gate drive signals of the switching devices and an output current direction; a failure detection algorithm to detect a failure condition in any of the switching devices based on the blocking state logic signals and the expected voltage blocking states of the switching devices. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A multilevel converter comprising:
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a plurality of phase legs each having at least two inner switching devices, at least two outer switching devices, at least two clamping diodes and a split DC link; and a switching device failure detection circuit comprising a voltage calculation module to determine an expected output voltage at phase terminals of phase legs based on gate drive signals of switching devices and an output current direction; a failure detection algorithm to detect a failure condition in any of the switching devices by comparing the expected output voltage with an actual output voltage.
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18. A method of determining a failure condition in switching devices of a multilevel converter comprising a split DC link and a plurality of phase legs each having at least two inner switching devices, at least two outer switching devices, at least two clamping diodes, the method comprising:
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determining an expected voltage blocking state for each of the switching devices based on gate drive signals of the switching devices and an output current direction; generating blocking state logic signals by comparing terminal voltages across the switching devices and a threshold reference voltage; and detecting failure conditions in the switching devices based on the blocking state logic signals and the voltage blocking states for the switching devices.
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19. (canceled)
Specification