Memory Module Having High Data Processing Rate

• US 20110141790A1
• Filed: 02/25/2011
• Published: 06/16/2011
• Est. Priority Date: 02/01/2007
• Status: Active Grant

• Current Assignee: Gwang-Man Lim
• Original Assignee: Gwang-Man Lim
• Inventors: LIM, Gwang-Man
• Granted Patent: US 8,174,861 B2
• Time in Patent Office: Days
• US Class Current: 365/64
• CPC Class Codes: G06F 13/4243 with synchronous protocol
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to the controller, and an optical generator converting an internal output signal received from the controller into an external output signal. The optical detector converts an external input optical signal into an internal input signal to transmit the converted signal to the controller. The optical generator converts an internal output signal received from the controller into an external output optical signal.

Claims

1. A memory module comprising:

a memory chip;

a controller controlling an operation of the memory chip;

an optical detector converting an external input optical signal into an internal input signal to transmit the converted signal to the controller; and

an optical generator converting an internal output signal received from the controller into an external output optical signal.

2. The memory module of claim 1, further comprising optical input/output terminals receiving the external input optical signal from an appliance and outputting the external output optical signal to the appliance, respectively.

3. The memory module of claim 2, wherein the optical input/output terminals are integrally formed.

4. The memory module of claim 2, wherein the optical input/output terminals are separately formed.

5. The memory module of claim 1, further comprising a power supply supplying an internal power to the memory chip, the controller, the optical detector, and the optical generator.

6. The memory module of claim 5, wherein the power supply comprises terminals electrically connected to an external power.

7. The memory module of claim 5, wherein the power supply is a built-in battery.

8. The memory module of claim 5, wherein the power supply comprises:

terminals electrically connected to the external power; and

a built-in battery.

9. The memory module of claim 8, further comprising a power management unit connected to the power supply to automatically convert the external power into the internal power when a power failure suddenly occurs.

10. The memory module of claim 9, wherein the power management unit is controlled by the controller to adjust a voltage supplied to the memory chip, the optical detector, and the optical generator.

11. The memory module of claim 1, further comprising an optical signal processor including the optical detector and the optical generator,

wherein the optical signal processor processes a multi-channel optical signal.

12. The memory module of claim 11, wherein the external input optical signal is inputted through a multi-channel data path, and the optical signal processor divides a multi-channel optical signal received over the multi-channel data path, converts the divided signal into a plurality of internal input signals, and transmits the converted signals to the controller.

13. The memory module of claim 12, wherein the memory chip comprises a plurality of memory regions and the controller distributes the plurality of internal input signals to the memory regions.

14. The memory module of claim 11, wherein the memory chip comprises a plurality of memory regions and the controller transmits a plurality of internal output signals to the optical signal processor in response to a plurality of data signals outputted from the memory regions.

15. The memory module of claim 14, wherein the optical signal processor converts the plurality of internal output signals into multi-channel external output optical signals.

16. The memory module of claim 14, wherein the memory regions are regions formed by logically dividing a single memory chip.

17. The memory module of claim 14, wherein the memory regions are a plurality of physically divided memory chips.

18. A memory module comprising:

at least one memory chip, the memory chip including at least one memory region;

an optical input terminal configured to receive an optical data signal;

an optical detector configured to convert the received optical data signal into an electrical input signal, the optical detector including an optical filter and an optical amplifier;

a controller configured to control data signals input to the memory chip and output from the memory chip, the controller configured to receive the converted electrical input signal and transmit an internal electrical input signal to the memory chip and configured to receive an internal electrical output signal from the memory chip and transmit an electrical output signal;

an optical generator configured to receive the transmitted electrical output signal from the controller and convert the electrical output signal into an optical data signal; and

an optical output terminal configured to transmit the optical data signal out of the memory module.

19. The memory module of claim 18, wherein optical detector includes a photodiode and the optical generator includes a light-emitting diode.

20. The memory module of claim 18, further comprising a power supply supplying an internal power to the memory chip, the controller, the optical detector, and the optical generator.