METHOD AND SYSTEM FOR INTEGRATING TRANSMIT SWITCH FUNCTIONALITY IN A WLAN RADIO TRANSCEIVER

• US 20110143690A1
• Filed: 12/10/2009
• Published: 06/16/2011
• Est. Priority Date: 12/10/2009
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: Ralink Technology Corporation (MediaTek, Inc.)
• Inventors: LU, Eric Chiyuan, KO, Jen-Wei, JERNG, Albert Chia-Wen, YAO, Weijun
• Granted Patent: US 9,397,720 B2
• Time in Patent Office: Days
• US Class Current: 455/78
• CPC Class Codes: H04B 1/00 Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
• CPC Class Codes: H04B 1/44 Transmit/receive switching

Abstract

A radio transceiver is disclosed. The transceiver comprises an integrated circuit. The integrated circuit comprises a transmit path; a first switch coupled in series with the output of the transmit path; a receive path; and a second switch coupled as a shunt with the input of the receive path. The transceiver further comprises a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to ensure minimal loading from one path to the other. The transceiver also comprises a shared balun for converting differential signals from the plurality of external matching networks to single ended signals; and an antenna to interface with the single ended signals. A method and system in accordance with an embodiment enables tying together the transmit path and the receive paths of a radio transceiver without the need for an external T/R switch. A method and system in accordance with an embodiment minimizes the loading effects between the transmit path and the receive path such that output power and NF noise figure are not degraded after tying the transmit path and the receive path together.

Claims

1. A transceiver comprising:

an integrated circuit comprising;

a transmit path;

a first switch coupled in series with the output of the transmit path;

a receive path;

a second switch coupled as a shunt with the input of the receive path; and

a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to ensure minimal loading from one path to the other.

2. The transceiver of claim 1, wherein the transceiver includes:

a shared balun for converting differential signals from the plurality of external matching networks to single ended signals; and

an antenna to interface with the single ended signals.

3. The transceiver of claim 1, wherein the integrated circuit further comprises a radio transceiver integrated circuit.

4. The transceiver of claim 1, wherein the transmit path comprises a low noise amplifier (LNA) and an RF Down Converter coupled to the LNA, and the receive path comprises a power amplifier (PA) and an RF Up Converter coupled to the PA.

5. The transceiver of claim 1, wherein the plurality of matching networks comprises:

a first network for providing a large inductance when the circuit is in a transmit mode and providing an impedance match to the LNA input when the circuit is in a receive mode;

a second network for providing minimal loading when in the receive mode; and

a third network for providing impedance matching for the receive and the transmit paths.

6. The transceiver of claim 1, wherein the first and second switches are closed when the transceiver is in a transmit mode, and the first and second switches are open when the transceiver is in a receive mode.

7. The transceiver of claim 5 wherein the first network comprises a series inductance, the second network comprises a series capacitance and the third network comprises a shunt inductance.

8. The transceiver of claim 4 which includes a digital signal processor for receiving data from the RF Down Converter and for transmitting data to the RF Up Converter.

9. A method comprising:

providing an integrated circuit comprising;

a transmit path;

a first switch coupled in series with the output of the transmit path;

a receive path;

a second switch coupled as a shunt with the input of the receive path; and

providing a plurality of external matching networks coupled to the transmit and receive paths of the integrated circuit to ensure minimal loading from one path to the other.

10. The method of claim 9, comprising:

converting differential signals from the plurality of external matching networks to single ended signals; and

interfacing with the single ended signals.

11. The method of claim 9, wherein the transmit path comprises a low noise amplifier (LNA) and an RF Down Converter coupled to the LNA, and the receive path comprises a power amplifier (PA) and an RF Up Converter coupled to the PA.

12. The method of claim 9, wherein the plurality of matching networks comprises:

a first network for providing a large inductance when the circuit is in a transmit mode and providing an impedance match to the LNA input when the circuit is in a receive mode;

a second network for providing minimal loading when in the receive mode; and

a third network for providing impedance matching for the receive and the transmit paths.

13. The method of claim 9, further comprising closing the first and second switches when the transceiver is in a transmit mode, and opening the first and second switches when the transceiver is in a receive mode.

14. The method of claim 13, wherein the first network comprises a series inductance, the second network comprises a series capacitance and the third network comprises a shunt inductance.

15. The method of claim 11, which includes receiving data from the RF Down Converter and transmitting data to the RF Up Converter by a digital signal processor.