SEMICONDUCTOR DEVICE, MEASUREMENT APPARATUS, AND MEASUREMENT METHOD OF RELATIVE PERMITTIVITY

• US 20110147736A1
• Filed: 12/13/2010
• Published: 06/23/2011
• Est. Priority Date: 12/17/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: MIYANAGA, Akiharu, HONDA, Tatsuya
• Granted Patent: US 8,853,683 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: G01R 27/2623 Measuring-systems or electronic circuits G01R27/2635, G01R27/2682 take precedence
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 29/94 Metal-insulator-semiconductors, e.g. MOS

Abstract

The field of an oxide semiconductor has been attracted attention in recent years. Therefore, the correlation between electric characteristics of a transistor including an oxide semiconductor layer and physical properties of the oxide semiconductor layer has not been clear yet. Thus, a first object is to improve electric characteristics of the transistor by control of physical properties of the oxide semiconductor layer. A semiconductor device including at least a gate electrode, an oxide semiconductor layer, and a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer, where the oxide semiconductor layer has the relative permittivity of equal to or higher than 13 (or equal to or higher than 14), is provided.

Claims

1. A measurement apparatus comprising:

a semiconductor; and

an electrode provided over the oxide semiconductor layer.

2. The measurement apparatus according to claim 1, wherein the semiconductor comprises silicon.

3. The measurement apparatus according to claim 1, wherein the electrode provided over the oxide semiconductor layer has a stacked structure.

4. The measurement apparatus according to claim 1, wherein the measurement apparatus is used for measuring a relative permittivity of an oxide semiconductor layer.

5. A measurement apparatus comprising:

a semiconductor;

an oxide semiconductor layer provided over the semiconductor; and

an electrode provided over the oxide semiconductor layer.

6. The measurement apparatus according to claim 5, wherein the semiconductor comprises silicon.

7. The measurement apparatus according to claim 5, wherein the oxide semiconductor layer provided over the semiconductor comprises an In—

Ga—

Zn—

O-based oxide.

8. The measurement apparatus according to claim 5, wherein the electrode provided over the oxide semiconductor layer has a stacked structure.

9. The measurement apparatus according to claim 5, wherein the measurement apparatus is used for measuring a relative permittivity of an oxide semiconductor layer.

10. The measurement apparatus according to claim 5, wherein the semiconductor has a smaller band gap than the oxide semiconductor layer provided over the semiconductor.

11. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer; and

a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer,

wherein a relative permittivity of the oxide semiconductor layer is equal to or higher than 13.

13. The semiconductor device according to claim 11 or 12, wherein the oxide semiconductor layer contains indium, gallium, zinc, and oxygen as a main component.

12. A semiconductor device comprising:

a gate electrode;

an oxide semiconductor layer; and

a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer,

wherein a relative permittivity of the oxide semiconductor layer is equal to or higher than 14.

14. A method for measuring a relative permittivity comprising the steps of:

forming a measurement apparatus which comprising;

a semiconductor;

an oxide semiconductor layer provided over the semiconductor, wherein the oxide semiconductor layer has a wider band gap than the semiconductor layer; and

a gate electrode provided over the oxide semiconductor;

calculating a capacitance Ca in an accumulation region of C-V characteristics of the measurement apparatus; and

calculating a relative permittivity ∈

of the oxide semiconductor layer by substituting the capacitance C_a into the following formula,

(wherein in the formula, ∈

₀ is a vacuum permittivity, S is an area of the gate electrode, and d is a thickness of the oxide semiconductor layer).

[FORMULA 1]

Q=C_ox(V_gs−

V_th−

ψ

) 

 

(1)