SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20110147739A1
• Filed: 12/15/2010
• Published: 06/23/2011
• Est. Priority Date: 12/18/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: SHIMAZU, Takashi, TAKAHASHI, Masahiro, HIROHASHI, Takuya, YAMAZAKI, Shunpei
• Granted Patent: US 9,034,104 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A single-component oxide semiconductor layer is formed over a substrate; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a single-component oxide semiconductor layer including single crystal regions is formed; and a multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.

Claims

1. A method for manufacturing a semiconductor device, comprising:

carrying out crystal growth of a multi-component oxide semiconductor layer using a single-component oxide semiconductor layer including single crystal regions formed over a substrate as a seed crystal to form a multi-component oxide semiconductor layer including single crystal regions.

2. The method for manufacturing a semiconductor device, according to claim 1, wherein the crystal growth is carried out by heat treatment at higher than or equal to 500°

C. and lower than or equal to 1000°

C.

3. The method for manufacturing a semiconductor device, according to claim 1, wherein the crystal growth of the multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the multi-component oxide semiconductor layer including single crystal regions.

4. The method for manufacturing a semiconductor device, according to claim 1, wherein the single-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

5. The method for manufacturing a semiconductor device, according to claim 1, wherein the multi-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

6. The method for manufacturing a semiconductor device, according to claim 1, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions each have a hexagonal crystal structure.

7. The method for manufacturing a semiconductor device, according to claim 1, wherein the single-component oxide semiconductor layer comprises zinc oxide.

8. The method for manufacturing a semiconductor device, according to claim 1, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are dehydrated or dehydrogenated.

9. The method for manufacturing a semiconductor device, according to claim 1, wherein carrier density is lower than 1×

10¹⁴ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

10. The method for manufacturing a semiconductor device, according to claim 1, wherein carrier density is lower than 1.45×

10¹⁰ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

11. The method for manufacturing a semiconductor device, according to claim 1, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are intrinsic semiconductors.

12. A method for manufacturing a semiconductor device, comprising:

forming a single-component oxide semiconductor layer including single crystal regions over a substrate; and

forming a multi-component oxide semiconductor layer including single crystal regions using the single-component oxide semiconductor layer including single crystal regions as a seed crystal.

13. The method for manufacturing a semiconductor device, according to claim 12, wherein crystal growth is carried out by heat treatment at higher than or equal to 500°

C. and lower than or equal to 1000°

C.

14. The method for manufacturing a semiconductor device, according to claim 12, wherein crystal growth of the multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the multi-component oxide semiconductor layer including single crystal regions.

15. The method for manufacturing a semiconductor device, according to claim 12, wherein the single-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

16. The method for manufacturing a semiconductor device, according to claim 12, wherein the multi-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

17. The method for manufacturing a semiconductor device, according to claim 12, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions each have a hexagonal crystal structure.

18. The method for manufacturing a semiconductor device, according to claim 12, wherein the single-component oxide semiconductor layer comprises zinc oxide.

19. The method for manufacturing a semiconductor device, according to claim 12, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are dehydrated or dehydrogenated.

20. The method for manufacturing a semiconductor device, according to claim 12, wherein carrier density is lower than 1×

10¹⁴ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

21. The method for manufacturing a semiconductor device, according to claim 12, wherein carrier density is lower than 1.45×

10¹⁰ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

22. The method for manufacturing a semiconductor device, according to claim 12, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are intrinsic semiconductors.

23. A method for manufacturing a semiconductor device, comprising:

forming a single-component oxide semiconductor layer over a substrate;

carrying out crystal growth from a surface to an inside of the single-component oxide semiconductor layer by performing first heat treatment to form a single-component oxide semiconductor layer including single crystal regions;

forming a multi-component oxide semiconductor layer over the single-component oxide semiconductor layer including single crystal regions; and

carrying out crystal growth of the multi-component oxide semiconductor layer by performing second heat treatment to form a multi-component oxide semiconductor layer including single crystal regions.

24. The method for manufacturing a semiconductor device, according to claim 23 further comprising:

forming a gate electrode over a substrate;

forming a gate insulating layer over the gate electrode;

forming the single-component oxide semiconductor layer over the gate insulating layer;

etching the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions into island-shapes; and

forming a source electrode and a drain electrode over the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions which have island-shapes.

25. The method for manufacturing a semiconductor device, according to claim 23, wherein the crystal growth is carried out by heat treatment at higher than or equal to 500°

C. and lower than or equal to 1000°

C.

26. The method for manufacturing a semiconductor device, according to claim 23, wherein the crystal growth of the multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the multi-component oxide semiconductor layer including single crystal regions.

27. The method for manufacturing a semiconductor device, according to claim 23, wherein the single-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

28. The method for manufacturing a semiconductor device, according to claim 23, wherein the multi-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

29. The method for manufacturing a semiconductor device, according to claim 23, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions each have a hexagonal crystal structure.

30. The method for manufacturing a semiconductor device, according to claim 23, wherein the single-component oxide semiconductor layer comprises zinc oxide.

31. The method for manufacturing a semiconductor device, according to claim 23, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are dehydrated or dehydrogenated.

32. The method for manufacturing a semiconductor device, according to claim 23, wherein carrier density is lower than 1×

10¹⁴ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

33. The method for manufacturing a semiconductor device, according to claim 23, wherein carrier density is lower than 1.45×

10¹⁰ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

34. The method for manufacturing a semiconductor device, according to claim 23, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are intrinsic semiconductors.

35. A method for manufacturing a semiconductor device, comprising:

forming a single-component oxide semiconductor layer over a substrate;

carrying out crystal growth from a surface to an inside of the single-component oxide semiconductor layer by performing heat treatment to form a single-component oxide semiconductor layer including single crystal regions; and

forming a multi-component oxide semiconductor layer including single crystal regions over the single-component oxide semiconductor layer including single crystal regions by a sputtering method while performing heating.

36. The method for manufacturing a semiconductor device, according to claim 35, wherein the crystal growth is carried out by heat treatment at higher than or equal to 500°

C. and lower than or equal to 1000°

C.

37. The method for manufacturing a semiconductor device, according to claim 35, wherein the crystal growth of the multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the multi-component oxide semiconductor layer including single crystal regions.

38. The method for manufacturing a semiconductor device, according to claim 35, wherein the single-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

39. The method for manufacturing a semiconductor device, according to claim 35, wherein the multi-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

40. The method for manufacturing a semiconductor device, according to claim 35, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions each have a hexagonal crystal structure.

41. The method for manufacturing a semiconductor device, according to claim 35, wherein the single-component oxide semiconductor layer comprises zinc oxide.

42. The method for manufacturing a semiconductor device, according to claim 35, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are dehydrated or dehydrogenated.

43. The method for manufacturing a semiconductor device, according to claim 35, wherein carrier density is lower than 1×

10¹⁴ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

44. The method for manufacturing a semiconductor device, according to claim 35, wherein carrier density is lower than 1.45×

10¹⁰ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

45. The method for manufacturing a semiconductor device, according to claim 35, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are intrinsic semiconductors.

46. The method for manufacturing a semiconductor device, according to claim 35 further comprising:

forming an island of the single-component oxide semiconductor layer including single crystal regions and an island of the multi-component oxide semiconductor layer including single crystal regions by etching thereof;

forming a source electrode and a drain electrode over the island of the single-component oxide semiconductor layer including single crystal regions and the island of the multi-component oxide semiconductor layer including single crystal regions;

forming a gate insulating layer over the source electrode and the drain electrode; and

forming a gate electrode over the gate insulating layer.

47. The method for manufacturing a semiconductor device, according to claim 35 further comprising:

forming a gate electrode over a substrate;

forming a gate insulating layer over the gate electrode;

forming the single-component oxide semiconductor layer over the gate insulating layer;

forming an island of the single-component oxide semiconductor layer including single crystal regions and an island of the multi-component oxide semiconductor layer including single crystal regions by etching thereof; and

forming a source electrode and a drain electrode over the island of the single-component oxide semiconductor layer including single crystal regions and the island of the multi-component oxide semiconductor layer including single crystal regions.

48. A method for manufacturing a semiconductor device, comprising:

forming a single-component oxide semiconductor layer over a substrate;

carrying out crystal growth from a surface to an inside of the single-component oxide semiconductor layer by performing first heat treatment to form a single-component oxide semiconductor layer including single crystal regions;

forming a multi-component oxide semiconductor layer over the single-component oxide semiconductor layer including single crystal regions;

carrying out crystal growth of the multi-component oxide semiconductor layer by performing second heat treatment to form a multi-component oxide semiconductor layer including single crystal regions;

etching the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions into island-shapes;

forming a source electrode and a drain electrode over the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions which have island-shapes;

forming a gate insulating layer over the source electrode and the drain electrode; and

forming a gate electrode over the gate insulating layer.

49. The method for manufacturing a semiconductor device, according to claim 48, wherein the crystal growth is carried out by heat treatment at higher than or equal to 500°

C. and lower than or equal to 1000°

C.

50. The method for manufacturing a semiconductor device, according to claim 48, wherein the crystal growth of the multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the multi-component oxide semiconductor layer including single crystal regions.

51. The method for manufacturing a semiconductor device, according to claim 48, wherein the single-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

52. The method for manufacturing a semiconductor device, according to claim 48, wherein the multi-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface and a c-axis perpendicular to the surface.

53. The method for manufacturing a semiconductor device, according to claim 48, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions each have a hexagonal crystal structure.

54. The method for manufacturing a semiconductor device, according to claim 48, wherein the single-component oxide semiconductor layer comprises zinc oxide.

55. The method for manufacturing a semiconductor device, according to claim 48, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are dehydrated or dehydrogenated.

56. The method for manufacturing a semiconductor device, according to claim 48, wherein carrier density is lower than 1×

10¹⁴ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

57. The method for manufacturing a semiconductor device, according to claim 48, wherein carrier density is lower than 1.45×

10¹⁰ cm<sup>−

3</sup> in the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions.

58. The method for manufacturing a semiconductor device, according to claim 48, wherein the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions are intrinsic semiconductors.

59. A semiconductor device comprising:

an oxide semiconductor stack including a single-component oxide semiconductor layer including single crystal regions and a multi-component oxide semiconductor layer including single crystal regions;

a gate electrode;

a gate insulating layer provided between the oxide semiconductor stack and the gate electrode; and

a wiring electrically connected to the oxide semiconductor stack,

wherein each of the single-component oxide semiconductor layer including single crystal regions and the multi-component oxide semiconductor layer including single crystal regions has a c-axis perpendicular to a surface.

60. The semiconductor device according to claim 59, wherein the gate electrode overlaps over the oxide semiconductor stack with the gate insulating layer provided therebetween.

61. The semiconductor device according to claim 59, wherein the oxide semiconductor stack overlaps over the gate electrode with the gate insulating layer provided therebetween.

62. The semiconductor device according to claim 59, wherein the wiring is provided between the oxide semiconductor stack and the gate insulating layer.

63. The semiconductor device according to claim 59, wherein the oxide semiconductor stack is provided between the gate insulating layer and the wiring.