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POLISH TO REMOVE TOPOGRAPHY IN SACRIFICIAL GATE LAYER PRIOR TO GATE PATTERNING

  • US 20110147812A1
  • Filed: 12/23/2009
  • Published: 06/23/2011
  • Est. Priority Date: 12/23/2009
  • Status: Active Grant
First Claim
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1. A method for fabricating a semiconductor transistor, comprising:

  • forming a fin structure on a substrate;

    depositing sacrificial gate material over the fin structure; and

    polishing the sacrificial gate material, prior to gate patterning of the sacrificial gate material and transistor formation.

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