Clock data recovery circuit, data transfer device for display device, and data transfer method for display device
First Claim
1. A clock data recovery circuit comprising:
- a sampling circuit that samples input data by 2×
over sampling;
a frequency detection circuit that detects a frequency difference between the input data and a recovery clock, the input data being sampled by the sampling circuit;
a phase detection circuit that detects a phase difference between the input data and the recovery clock, the input data being sampled by the sampling circuit;
a voltage control oscillator circuit that outputs the recovery clock to the sampling circuit at least according to the phase difference detected by the phase detection circuit; and
a frequency detection control circuit that stops an operation of the frequency detection circuit while receiving display data as the input data.
1 Assignment
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Accused Products
Abstract
A clock data recovery circuit includes a sampling circuit SC that samples input data by 2× over sampling, a frequency detection circuit FD that detects a frequency difference between the input data sampled by the sampling circuit SC and a recovery clock, a phase detection circuit PD that detects a phase difference between the input data sampled by the sampling circuit SC and the recovery clock, a voltage control oscillator circuit VCO that outputs the recovery clock to the sampling circuit SC at least according to the phase difference detected by the phase detection circuit PD, and a frequency detection control circuit FDC that stops an operation of the frequency detection circuit FD while receiving display data as the input data.
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Citations
10 Claims
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1. A clock data recovery circuit comprising:
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a sampling circuit that samples input data by 2×
over sampling;a frequency detection circuit that detects a frequency difference between the input data and a recovery clock, the input data being sampled by the sampling circuit; a phase detection circuit that detects a phase difference between the input data and the recovery clock, the input data being sampled by the sampling circuit; a voltage control oscillator circuit that outputs the recovery clock to the sampling circuit at least according to the phase difference detected by the phase detection circuit; and a frequency detection control circuit that stops an operation of the frequency detection circuit while receiving display data as the input data. - View Dependent Claims (2, 3, 4, 5)
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6. A data transfer apparatus for a display device comprising:
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a timing controller that transmits transfer data; and a display element driver circuit that receives the transfer data, the transfer data being transmitted from the timing controller, wherein the display element driver circuit comprises; a sampling circuit that samples input data by 2×
over sampling;a frequency detection circuit that detects a frequency difference between the input data and a recovery clock, the input data being sampled by the sampling circuit; a phase detection circuit that detects a phase difference between the input data and the recovery clock, the input data being sampled by the sampling circuit; a voltage control oscillator circuit that outputs the recovery clock to the sampling circuit at least according to the phase difference detected by the phase detection circuit; and a frequency detection control circuit that stops an operation of the frequency detection circuit while receiving display data as the input data. - View Dependent Claims (7, 8)
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9. A data transfer method for a display device that transfers data from a timing controller to a display element driver circuit, the data transfer method comprising:
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sampling transfer data by 2×
over sampling;detecting a phase difference between the sampled transfer data and a recovery clock instead of a frequency difference while the transfer data is display data so as to generate the recovery clock; detecting the frequency difference and the phase difference of the sampled transfer data while the transfer data is not the display data so as to generate the recovery clock. - View Dependent Claims (10)
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Specification