POWER CONTROL METHOD FOR A GERAN SYSTEM TO INCREASE GERAN NETWORK CAPACITY
First Claim
1. ) A method for controlling GERAN power, comprising.controlling signal power by allowing a small bit error rate during burst processing.
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Abstract
The present patent application comprises means, instructions and steps for controlling signal power by allowing a small bit error rate during burst processing comprising setting a transmit signal power granularity to be less than a current level (1210), tracking a power measurement report of at least one remote stations (1220), determining if at least one signal quality indicator has reached an upper threshold (1230), decreasing a downlink signal power if the at least one signal quality indicator reaches an upper threshold (1240), and stopping the decreasing of the downlink signal power (1260) when the at least one quality indicator reaches a lower threshold (1250).
46 Citations
34 Claims
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1. ) A method for controlling GERAN power, comprising.
controlling signal power by allowing a small bit error rate during burst processing.
- 12. ) An apparatus for controlling GERAN power, comprising. means for controlling signal power by allowing a small bit error rate during burst processing.
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23. ) A base station 920, comprising:
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a controller processor 960; an antenna 925; a duplexer switch 926 operably connected to said base station antenna 925; a receiver front end 924 operably connected to said duplexer switch 926; a receiver demodulator 923 operably connected to said receiver front end 924; a channel decoder and de-interleaver 922 operably connected to said receiver demodulator 923 and said controller processor 960; a base station controller interface 921 operably connected to said controller processor 960; a coder and interleaver 929 operably connected to said controller processor 960; a transmitter modulator 928 operably connected to said coder and interleaver 929; a transmitter front end module 927 operably connected to said transmitter modulator 928 and operably connected to said duplexer switch 926; a data bus 970 operably connected between said controller processor 960 and said channel decoder and de-interleaver 922, said receiver demodulator 923, said receiver front end 924, said transmitter modulator 928 and said transmitter front end 927; and software 961 stored in said memory 962, wherein said software 961 comprises instructions to control signal power by allowing a small bit error rate during burst processing. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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34. A computer program product, comprising:
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computer-readable medium comprising; code for causing a computer to control signal power by allowing a small bit error rate during burst processing, comprising instructions to; set a transmit signal power granularity to be less than a current level. track a power measurement report of at least one remote stations 123-127; determine if at least one signal quality indicator has reached an upper threshold; decrease a downlink signal power if said at least one signal quality indicator reaches an upper threshold; and stop said decreasing of said downlink signal power when said at least one quality indicator reaches a lower said threshold.
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Specification