DATA STORAGE DEVICE TESTER

• US 20110154113A1
• Filed: 03/29/2010
• Published: 06/23/2011
• Est. Priority Date: 12/23/2009
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Stevens, Curtis E., Blackburn, Daniel K., Dalphy, Lawrence J.
• Granted Patent: US 8,458,526 B2
• Time in Patent Office: Days
• US Class Current: 714/35
• CPC Class Codes: G11B 20/1816 Testing
• CPC Class Codes: G11B 2220/2516 Hard disks
• CPC Class Codes: G11B 2220/80 Indexing information stored in optical or magnetic or other strip attached to cassette or disc, e.g. barcodes attached to a recording medium
• CPC Class Codes: G11B 27/34 Indicating arrangements indicating means incorporated in magazine or cassette G11B23/046 and G11B23/0875; indicating measured values in general G01D
• CPC Class Codes: G11B 27/36 Monitoring, i.e. supervising the progress of recording or reproducing for digital recording G11B20/00 and s.gr.; for monitoring, testing or measuring of TV recorders of the type covered by H04N5/76 and subgroups, see H04N17/06

Abstract

A data storage device (DSD) tester for testing a DSD is disclosed. The DSD tester comprises control circuitry operable to receive a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition. A sequence of commands associated with the error condition is executed in order to determine whether the DSD is defective.

Claims

1. A data storage device (DSD) tester for testing a DSD, the DSD tester comprising control circuitry operable to:

receive a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition;

execute a sequence of commands associated with the error condition; and

determine whether the DSD is defective in response to the executed sequence of commands.

2. The DSD tester as recited in claim 1, wherein the error condition identifies a marginal data sector detected during a read operation.

3. The DSD tester as recited in claim 2, wherein the sequence of commands comprises the read operation.

4. The DSD tester as recited in claim 2, wherein the sequence of commands comprises commands executed prior to the read operation.

5. The DSD tester as recited in claim 2, wherein the sequence of commands comprises commands executed after the read operation.

6. The DSD tester as recited in claim 1, wherein the control circuitry is further operable to margin channel parameters prior to executing the sequence of commands.

7. The DSD tester as recited in claim 2, wherein the control circuitry is further operable to margin channel parameters prior to executing the read operation.

8. The DSD tester as recited in claim 1, wherein the sequence of commands comprises at least one write command, the control circuitry is further operable to:

read data from a data sector identified by the write command; and

write the read data to the data sector when executing the write command as part of the sequence of commands.

9. The DSD tester as recited in claim 2, wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the control circuitry is further operable to:

read the retry log from the DSD; and

execute the plurality of commands identified by the retry log.

10. The DSD tester as recited in claim 2, wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the control circuitry is further operable to:

modify the plurality of commands identified by the retry log; and

execute the modified plurality of commands.

11. The DSD tester as recited in claim 10, wherein the control circuitry is further operable to transmit the modified plurality of commands to the DSD manufacturer.

12. The DSD tester as recited in claim 2, wherein:

the DSD comprises a global log identifying a plurality of sequential commands executed by the DSD; and

the sequence of commands associated with the read operation comprises at least two subsets of the sequential commands identified by the global log.

13. The DSD tester as recited in claim 1, wherein the control circuitry is further operable to transmit a result of the determination to a manufacturer of the DSD.

14. The DSD tester as recited in claim 1, further comprising a screen, wherein the control circuitry is further operable to display a result of the determination on the screen.

15. The DSD tester as recited in claim 1, wherein the control circuitry is further operable to execute the sequence of commands in response to a vendor specific command embedded in an Advanced Technology Attachment (ATA) command.

16. The DSD tester as recited in claim 1, further comprising a plurality of bays, wherein the control circuitry is further operable to detect when the DSD has been inserted into one of the bays.

17. The DSD tester as recited in claim 1, further comprising a Universal Serial Bus (USB) key operable to plug into a USB port of the DSD.

18. The DSD tester as recited in claim 1, wherein the DSD comprises a disk.

19. The DSD tester as recited in claim 1, wherein the DSD comprises a semiconductor memory.

20. A method of operating a data storage device (DSD) tester for testing a DSD, the method comprising:

receiving a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition;

executing a sequence of commands associated with the error condition; and

determining whether the DSD is defective in response to the executed sequence of commands.

21. The method as recited in claim 20, wherein the error condition identifies a marginal data sector detected during a read operation.

22. The method as recited in claim 21, wherein the sequence of commands comprises the read operation.

23. The method as recited in claim 21, wherein the sequence of commands comprises commands executed prior to the read operation.

24. The method as recited in claim 21, wherein the sequence of commands comprises commands executed after the read operation.

25. The method as recited in claim 20, further comprising margining channel parameters prior to executing the sequence of commands.

26. The method as recited in claim 21, further comprising margining channel parameters prior to executing the read operation.

27. The method as recited in claim 20, wherein the sequence of commands comprises at least one write command, the method further comprising:

reading data from a data sector identified by the write command; and

writing the read data to the data sector when executing the write command as part of the sequence of commands.

28. The method as recited in claim 21, wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the method further comprising:

reading the retry log from the DSD; and

executing the plurality of commands identified by the retry log.

29. The method as recited in claim 21, wherein the DSD comprises a retry log associated with the read operation, the retry log identifying a plurality of commands executed during a retry operation, the method further comprising:

modifying the plurality of commands identified by the retry log; and

executing the modified plurality of commands.

30. The method as recited in claim 29, further comprising transmitting the modified plurality of commands to the DSD manufacturer.

31. The method as recited in claim 21, wherein:

the DSD comprises a global log identifying a plurality of sequential commands executed by the DSD; and

the sequence of commands associated with the read operation comprises at least two subsets of the sequential commands identified by the global log.

32. The method as recited in claim 20, further comprising transmitting a result of the determination to a manufacturer of the DSD.

33. The method as recited in claim 20, further comprising displaying a result of the determination on a screen.

34. The method as recited in claim 20, further comprising executing the sequence of commands in response to a vendor specific command embedded in an Advanced Technology Attachment (ATA) command.

35. The method as recited in claim 20, further comprising detecting when the DSD has been inserted into a bay.

36. The method as recited in claim 20, further comprising plugging a Universal Serial Bus (USB) key into a USB port of the DSD.

37. The method as recited in claim 20, wherein the DSD comprises a disk.

38. The method as recited in claim 20, wherein the DSD comprises a semiconductor memory.