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MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

  • US 20110156024A1
  • Filed: 12/22/2010
  • Published: 06/30/2011
  • Est. Priority Date: 12/25/2009
  • Status: Active Grant
First Claim
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1. A memory device comprising a plurality of memory elements, the memory elements each comprising:

  • a first phase-inversion element and a second phase-inversion element which hold data by being connected to each other such that an input terminal of the first phase-inversion element is connected to an output terminal of the second phase-inversion element and an input terminal of the second phase-inversion element is connected to an output terminal of the first phase-inversion element;

    a capacitor; and

    a transistor which includes an oxide semiconductor in a channel formation region and which is configured to control writing of the data to the capacitor.

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