SEMICONDUCTOR DEVICE
First Claim
1. A semiconductor device comprising:
- a source line;
a bit line;
a signal line;
a word line;
memory cells;
a first driver circuit electrically connected to the source line through a first switching element and electrically connected to the bit line through a second switching element;
a second driver circuit electrically connected to the source line through a third switching element;
a third driver circuit electrically connected to the signal line; and
a fourth driver circuit electrically connected to the word line,wherein one of the memory cells comprises;
a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode;
a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and
a capacitor comprising a first terminal and a second terminal,wherein the second transistor comprises an oxide semiconductor material,wherein the first gate electrode, one of the second source electrode and the second drain electrode, and the first terminal are electrically connected to one another,wherein the source line, the first source electrode, and the other of the second source electrode and the second drain electrode are electrically connected to one another,wherein the bit line and the first drain electrode are electrically connected to each other,wherein the signal line and the second gate electrode are electrically connected to each other, andwherein the word line and the second terminal are electrically connected to each other.
1 Assignment
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Accused Products
Abstract
The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line through switching elements, a second driver circuit electrically connected to the source line through a switching element, a third driver circuit electrically connected to the signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material.
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Citations
24 Claims
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1. A semiconductor device comprising:
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a source line; a bit line; a signal line; a word line; memory cells; a first driver circuit electrically connected to the source line through a first switching element and electrically connected to the bit line through a second switching element; a second driver circuit electrically connected to the source line through a third switching element; a third driver circuit electrically connected to the signal line; and a fourth driver circuit electrically connected to the word line, wherein one of the memory cells comprises; a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor comprising a first terminal and a second terminal, wherein the second transistor comprises an oxide semiconductor material, wherein the first gate electrode, one of the second source electrode and the second drain electrode, and the first terminal are electrically connected to one another, wherein the source line, the first source electrode, and the other of the second source electrode and the second drain electrode are electrically connected to one another, wherein the bit line and the first drain electrode are electrically connected to each other, wherein the signal line and the second gate electrode are electrically connected to each other, and wherein the word line and the second terminal are electrically connected to each other. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device comprising:
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a source line; a bit line; a signal line; a word line; memory cells; a first driver circuit electrically connected to the source line through a first switching element and electrically connected to the bit line through a second switching element; a second driver circuit electrically connected to the bit line through a third switching element; a third driver circuit electrically connected to the signal line; and a fourth driver circuit electrically connected to the word line, wherein one of the memory cells comprises; a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor comprising a first terminal and a second terminal, wherein the second transistor comprises an oxide semiconductor material, wherein the first gate electrode, one of the second source electrode and the second drain electrode, and the first terminal are electrically connected to one another, wherein the source line and the first source electrode are electrically connected to each other, wherein the bit line, the first drain electrode and the other of the second source electrode and the second drain electrode are electrically connected to one another, wherein the signal line and the second gate electrode are electrically connected to each other, and wherein the word line and the second terminal are electrically connected to each other. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A semiconductor device comprising:
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n (n is a natural number) bit lines; l (l is the smallest natural number greater than or equal to n/2) source lines; m (m is a natural number) signal lines; m word lines; m×
n memory cells;a first driver circuit electrically connected to one of the l source lines through a first switching element and electrically connected to one of the n bit lines through a second switching element; a second driver circuit electrically connected to the one of the n bit lines through a third switching element; a third driver circuit electrically connected to one of the m signal lines; and a fourth driver circuit electrically connected to one of the m word lines, wherein one of the m×
n memory cells comprises;a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor comprising a first terminal and a second terminal, wherein the second transistor comprises an oxide semiconductor material, wherein the first gate electrode, one of the second source electrode and the second drain electrode, and the first terminal are electrically connected to one another, wherein one of the l source lines and the first source electrode are electrically connected to each other, wherein one of the n bit lines, the first drain electrode, and the other of the second source electrode and the second drain electrode are electrically connected to one another, wherein one of the m signal lines and the second gate electrode are electrically connected to each other, wherein one of the m word lines and the second terminal are electrically connected to each other, wherein the one of the l source lines is electrically connected to a first source electrode of another of the m×
n memory cells, and the another of the m×
n memory cells is adjacent to the one of the m×
n memory cells, andwherein a first drain electrode of the another of the m×
n memory cells is electrically connected to another of the n bit lines. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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Specification