HERMETIC MEMS DEVICE AND METHOD FOR FABRICATING HERMETIC MEMS DEVICE AND PACKAGE STRUCTURE OF MEMS DEVICE

• US 20110156106A1
• Filed: 12/28/2009
• Published: 06/30/2011
• Est. Priority Date: 12/28/2009
• Status: Active Grant

• Current Assignee: Solid State System Co., Ltd.
• Original Assignee: Solid State System Co., Ltd.
• Inventors: Liou, Jhyy-Cheng, Lee, Chien-Hsing, Hsieh, Tsung-Min
• Granted Patent: US 8,217,474 B2
• Time in Patent Office: Days
• US Class Current: 257/254
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81B 2207/07 Interconnects
• CPC Class Codes: B81B 2207/092 Buried interconnects in the substrate or in the lid
• CPC Class Codes: B81B 7/0064 for protecting against electromagnetic or electrostatic interferences
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0714 Forming the micromechanical structure with a CMOS process
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1461 MEMS

Abstract

A hermetic microelectromechanical system (MEMS) package includes a CMOS MEMS chip and a second substrate. The CMOS MEMS Chip has a first substrate, a structural dielectric layer, a CMOS circuit and a MEMS structure. The structural dielectric layer is disposed on a first side of the first structural substrate. The structural dielectric layer has an interconnect structure for electrical interconnection and also has a protection structure layer. The first structural substrate has at least a hole. The hole is under the protection structure layer to form at least a chamber. The chamber is exposed to the environment in the second side of the first structural substrate. The chamber also comprises a MEMS structure. The second substrate is adhered to a second side of the first substrate over the chamber to form a hermetic space and the MEMS structure is within the space.

Claims

1. A hermetic microelectromechanical system (MEMS) package, comprising:

a CMOS MEMS chip, having a first substrate being structural and a structural dielectric layer on a first side of the first substrate,

wherein the structural dielectric layer comprises an interconnection structure and a protection structure layer, wherein the first substrate comprises at least a hole and the protection structure layer is over the hole to form at least a chamber,

wherein the chamber is exposed to an environment at a second side of the first substrate, and a MEMS structure is inside the chamber, the interconnection structure comprises an output pad structure to couple the electrical signal of the CMOS MEMS chip out; and

a second substrate, adhered to a second side of the first substrate over the chamber to form a hermetic space, wherein the MEMS structure is within the hermetic space.

2. The hermetic MEMS package of claim 1, wherein the MEMS structure comprises a portion of the first substrate.

3. The hermetic MEMS package of claim 1, wherein the MEMS structure comprises a portion of the structural dielectric layer.

4. The hermetic MEMS package of claim 3, wherein the MEMS structure comprises a dielectric layer and a metal layer enclosing the dielectric layer.

5. The hermetic MEMS package of claim 1, wherein the protection structure layer comprises a hard mask layer or a structural conductive layer.

6. The hermetic MEMS package of claim 5, wherein the structural conductive layer comprises a grid structure over the chamber and a shielding layer over the MEMS structure and a CMOS circuit of the CMOS MEMS chip.

7. The hermetic MEMS package of claim 1, wherein a CMOS circuit is also formed in the first substrate and the structural dielectric layer, wherein the CMOS circuit is electrically coupled to the MEMS structure.

8. The hermetic MEMS package of claim 1, further comprising a metal bump on the output pad structure to couple the electrical signal out.

9. The hermetic MEMS package of claim 1, further comprising a third substrate disposed on the structural dielectric layer by an adhesive layer, wherein the third substrate also includes an extending output pad structure in electric connection with the output pad structure of the CMOS MEMS chip.

10. The hermetic MEMS package of claim 9, wherein the extending output pad structure in the third substrate layer electrically connected with the output pad structure of CMOS MEMS chip comprises conductive bumps or an adhesive layer on the output pad structure.

11. The hermetic MEMS package of claim 10, wherein the conductive bumps include stud bumps or solder bumps, wherein the adhesive layer includes solder paste or conductive or non-conductive epoxy.

12. The hermetic MEMS package of claim 1, wherein the second substrate is a flat layer without circuit.

13. The hermetic MEMS package of claim 1, wherein the second substrate adhered to the second side of the first substrate comprises an adhesive layer or a fusion layer.

14. A package structure of microelectromechanical system (MEMS) device, comprising:

a CMOS MEMS die, comprising;

a CMOS MEMS chip, having a first substrate being structural and a structural dielectric layer on the first side of the first substrate, wherein the structural dielectric layer comprises an interconnection structure and a protection structure layer, wherein the first substrate comprises at least a hole, wherein the protection structure layer is over the hole to form at least a chamber, wherein the chamber is exposed to an environment at the second side of the first substrate, wherein a MEMS structure is within the chamber, wherein the interconnection structure comprises an output pad structure to couple the electrical signal of the CMOS MEMS chip out; and

a second substrate, adhered to a second side of the first substrate over the chamber to form a hermetic space, wherein the MEMS structure is within the hermetic space;

a packaging circuit substrate, for holding the MEMS die; and

a molding layer, encapsulating over the MEMS die and the leadframe.

15. The package structure of MEMS device of claim 14, wherein a CMOS circuit is also formed in the first substrate and the structural dielectric layer, wherein the CMOS circuit is electrically coupled to the MEMS structure.

16. The package structure of MEMS device of claim 14, wherein the packaging circuit substrate is a lead frame, having a die pad for holding the MEMS die and a plurality of leads being connected with the CMOS circuit in the CMOS MEMS chip via bonding wires.

17. The package structure of MEMS device of claim 14, wherein the MEMS die further comprises a protection layer over the MEMS structure, and the protection layer has an opening to expose the output pad structure.

18. The package structure of MEMS device of claim 14, wherein the MEMS die further comprises a protection cap layer over the MEMS structure with an indent space, and the protection cap layer has an opening to expose the output pad structure.

19. The package structure of MEMS device of claim 14, wherein the packaging circuit substrate is a printed circuit board, and the MEMS die is electrically connected to the printed circuit board by bonding wire.

20. The package structure of MEMS device of claim 14, wherein the packaging circuit substrate is a printed circuit board, and the MEMS die is electrically connected to the printed circuit board by solder bump in flip-chip packaging structure.

21. The package structure of MEMS device of claim 14, wherein the MEMS structure comprises a portion of the first substrate.

22. The package structure of MEMS device of claim 14, wherein the MEMS structure comprises a portion of the structural dielectric layer.

23. The package structure of MEMS device of claim 22, wherein the MEMS structure comprises a dielectric layer and a metal layer enclosing the dielectric layer.

24. The package structure of MEMS device of claim 14, wherein the protection structure layer comprises a hard mask layer or a structural conductive layer.

25. The package structure of MEMS device of claim 24, wherein the structural conductive layer comprises a grid structure over the chamber and a shielding layer over the MEMS structure and the CMOS circuit.

26. The package structure of MEMS device of claim 14, wherein a second substrate adhered to a second side of the first substrate comprise an adhesive layer or a fusion layer.

27. A package structure of microelectromechanical system (MEMS) device, comprising:

a CMOS MEMS chip, having a first substrate being structural and a structural dielectric layer on a first side of the first substrate, wherein the structural dielectric comprises an interconnection structure, wherein the first substrate and the structural dielectric layer comprises at least a hole and a MEMS structure is within the hole, wherein the interconnection structure comprises an output pad structure to couple the electrical signal of the CMOS MEMS chip out; and

a second substrate, adhered to a second side of the first substrate over the hole to seal one side of the hole; and

a third substrate layer, adhered over the structural dielectric layer by an adhesive layer to seal the other side of the hole to form a hermetic space,

wherein the MEMS structure is within the hermetic space, wherein the third substrate layer has an extending output pad structure in the third substrate layer, the extending output pad structure has bottom end electrically connected to the output pad structure of the CMOS MEMS chip and a top end being exposed.

28. The package structure of MEMS device of claim 27, wherein the extending output pad structure in the third substrate layer electrically connected to the output pad structure of CMOS MEMS chip comprises conductive bumps or an adhesive layer on the output pad structure.

29. The package structure of MEMS device of claim 28, wherein the conductive bumps include stud bumps or solder bumps, wherein the adhesive layer includes conductive or nonconductive epoxy.

30. The package structure of MEMS device of claim 27, wherein the structural dielectric layer comprises a supporting conductive ring structure.

31. The package structure of MEMS device of claim 30, wherein the third substrate layer further comprises an embedded protection layer having a protecting ring in connection with the supporting conductive ring by a portion of the adhesive layer.

32. The package structure of MEMS device of claim 27, wherein the MEMS structure comprises a portion of the first substrate.

33. The package structure of MEMS device of claim 27, wherein the MEMS structure comprises a portion of the structural dielectric layer.

34. The package structure of MEMS device of claim 33, wherein the MEMS structure comprises a dielectric layer and a metal layer enclosing the dielectric layer.

35. The package structure of MEMS device of claim 27, wherein a second substrate adhered to a second side of the first substrate comprise an adhesive layer or a fusion layer.

36. A package structure of microelectromechanical system (MEMS) device, comprising:

a CMOS MEMS chip, having a first substrate being structural and a structural dielectric layer on the first side of the first substrate,

wherein the structural dielectric comprises an interconnection structure, and the interconnection structure comprises an output pad structure to couple the electrical signal of the CMOS MEMS chip out,

wherein the first substrate and the structural dielectric comprise a chamber at the first side of the first substrate, wherein the chamber is exposed to the environment in the top side of the structural dielectric layer against the first side of the first substrate, wherein a MEMS structure is within the chamber; and

a second substrate layer, adhered over the structural dielectric layer by a adhesive layer to seal the chamber and form a hermetic space, wherein the MEMS structure is within the hermetic space, wherein the second substrate layer has an extending output pad structure in the second substrate layer, the extending output pad structure has bottom end electrically connected to the output pad structure of the CMOS MEMS chip and a top end being exposed.

37. The package structure of MEMS device of claim 36, wherein the extending output pad structure in the third substrate layer electrically connected to the output pad structure of the CMOS MEMS chip comprises conductive bumps or an adhesive layer on the output pad structure.

38. The package structure of MEMS device of claim 37, wherein the conductive bumps includes stud bumps or solder bumps, wherein the adhesive layer includes s conductive or nonconductive epoxy.

39. The package structure of MEMS device of claim 36, wherein the structural dielectric layer comprises a supporting conductive ring structure.

40. The package structure of MEMS device of claim 39, wherein the second substrate layer further comprises a protecting ring in connection with the supporting ring in the structural dielectric layer by a portion of the adhesive layer.

41. The package structure of MEMS device of claim 39, wherein the second substrate comprises an indent structure in connection with the chamber, an outer ring to seal around the MEMS structure.

42. The package structure of MEMS device of claim 36, wherein the MEMS structure comprises a portion of the first substrate.

43. The package structure of MEMS device of claim 36, wherein the MEMS structure comprises a portion of the structural dielectric layer.

44. The package structure of MEMS device of claim 43, wherein the MEMS structure comprises a dielectric layer and a metal layer enclosing the dielectric layer.