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METHODS FOR FORMING THROUGH-SUBSTRATE CONDUCTOR FILLED VIAS, AND ELECTRONIC ASSEMBLIES FORMED USING SUCH METHODS

  • US 20110156266A1
  • Filed: 03/08/2011
  • Published: 06/30/2011
  • Est. Priority Date: 11/25/2008
  • Status: Active Grant
First Claim
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1. A method for forming through-substrate conductor filled vias for back-side electrical or thermal interconnections or both on a thinned substrate, comprising:

  • providing desired device regions with contacts on a front surface of an initial substrate having a back side;

    forming via cavities to a depth from the front surface partly through the initial substrate in desired locations;

    filling the via cavities with a conductive material coupled to some device region contacts;

    mounting the initial substrate with its front surface coupled to a support structure;

    thinning the initial substrate from the back side to provide a final substrate that is thinner than the initial substrate and on whose back surface are exposed internal ends of the conductive material filled vias;

    applying any desired back-side interconnect region coupled to the one or more exposed ends of the conductive material filled vias; and

    removing the support structure and separating individual device or IC assemblies of the final substrate so as to be available for mounting on a further circuit board, tape or larger circuit.

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