CAPACITANCE MEASUREMENT SYSTEMS AND METHODS

• US 20110156724A1
• Filed: 08/23/2010
• Published: 06/30/2011
• Est. Priority Date: 06/29/2007
• Status: Abandoned Application

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Best, Andrew, Bokma, Louis
• Application Number:
  US12/861,812
• Publication Number:
  US 20110156724A1
• Time in Patent Office: Days
• US Class Current: 324/658
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: H03K 17/955 using a capacitive detector
• CPC Class Codes: H03K 2217/960715 Rc-timing; e.g. measurement of variation of charge time or discharge time of the sensor

Abstract

A first capacitor and a second capacitor are charged until voltage at the second capacitor settles to a settling voltage. While charging, the first capacitor is alternately switched between a current source and ground. When the settling voltage is reached, charging of the first capacitor is halted. The second capacitor continues to be charged until voltage at the second capacitor reaches a reference voltage. The amount of time it takes for the settling voltage to reach the reference voltage corresponds to a measure of capacitance on the first capacitor.

Claims

1-26. -26. (canceled)

27. A system comprising:

a current source coupled to a first node of a first capacitor and to a first node of a second capacitor, the current source configured to provide a charge on the first and second capacitors, wherein the charge placed on the first and second capacitors generates a voltage potential across the first and second capacitors;

a switch network comprising a first switch configured to couple the current source and the first node of the first capacitor to the first node of the second capacitor and a second switch configured to couple the first node of the first capacitor to a second node of the second capacitor; and

a voltage measurement circuit configured to measure the voltage potential across the first and second capacitors,

wherein the second capacitor is coupled to the measurement circuit after the current source is configured and coupled to the first node of the first capacitor, and

wherein the currently source is configured to provide a charge on the first capacitor according to a predetermined charge rate.

28. The system of claim 27 wherein the first and second capacitors are coupled to the current source and to the voltage measurement circuit through a mutliplexor bus.

29. The system of claim 27, wherein the second capacitor is coupled to the voltage measurement circuit and the current source through a pin tap.

30. The system of claim 27, wherein the voltage measurement circuit comprises a first comparator comprising a first input coupled to the first and second capacitors, a second input coupled to a first reference voltage, and an output coupled to a processor.

31. The system of claim 30, wherein the voltage measurement circuit further comprises a second comparator comprising a first input coupled to the first and second capacitors, a second input coupled to a second reference voltage, and an output coupled to a processor.

32. The system of claim 27 further comprising a reference buffered coupled intermediate to the current source and the second capacitor, wherein the reference buffer is configured to charge the second capacitor at a rate substantially greater than the programmable current source.

33. The system of claim 27, wherein the first capacitor is a capacitance sensing input configured to have a variable capacitance in response to capacitance coupling to an activating element.

34. The system of claim 33, wherein the variable capacitance is a mutual capacitance between the first node of the first capacitor and a drive electrode, the drive electrode configured to provide a variable voltage signal.

35. A method for measuring a capacitive input comprising:

configuring a current source to charge a first capacitor, wherein a first node of the first capacitor is the capacitive input and wherein the current source has an adjustable output;

coupling the first capacitor and the current source to a multiplexor bus;

coupling a second capacitor to the multiplexor bus;

charging a first capacitor and a second capacitor until voltage at the second capacitor settles to a settling voltage, wherein during the charging the first capacitor is switched back and forth between a current source and ground;

when the settling voltage is reached, halting charging of the first capacitor while continuing to charge the second capacitor until voltage at the second capacitor reaches a reference voltage that is greater than the settling voltage; and

determining a measure of time for the settling voltage to reach the reference voltage, wherein the measure of time corresponds to a measure of capacitance on the first capacitor.

36. The method of claim 35 further comprising:

charging a third capacitor until voltages at the second and third capacitors settle to the settling voltage; and

after the settling voltage is reached and the charging of the first capacitor is halted, continue charging the third capacitor until voltage at the third capacitor reaches the reference voltage.

37. The method of claim 35 wherein the charging further comprises supplying a constant charging current to the first and second capacitors using a digital current source.

38. The method of claim 35 wherein the determining further comprises:

counting a first number of oscillatory cycles until the settling voltage reaches the reference voltage, wherein the first number corresponds to the measure of capacitance on the first capacitor;

halting charging of the second capacitor and reducing voltage at the second capacitor to less than the threshold voltage after voltage at the second capacitor reaches the threshold voltage;

charging the first and second capacitors until voltage at the second capacitor settles to the settling voltage;

halting charging of the first capacitor while continuing to charge the second capacitor until voltage at the second capacitor again reaches the reference voltage when the settling voltage is again reached; and

counting a second number of oscillatory cycles until voltage at the second capacitor reaches the reference voltage.

39. The method of claim 38 further comprising comparing the first and second numbers to identify a change in the measure of capacitance on the first capacitor.

40. The method of claim 35 further comprising detecting an element in sensing range of at least one of the capacitors based on capacitances measured for the plurality of capacitors.

41. The method of claim 35 further comprising:

comparing the measure of time to a reference measure of time;

adjusting an output of an internal main oscillator in response to the comparison;

adjusting at least one of a plurality of trim values for the internal main oscillator after adjusting the output of the internal main oscillator;

configuring an oscillator for the measuring of the capacitive input after adjusting the at least one the plurality of trim values; and

repeating the measuring of the capacitive input.

42. An apparatus comprising a programmable current source coupled to a variable capacitor and a switch network, the switch network configured to couple the programmable current source to a ground potential and to a second capacitor and an input of a voltage measurement circuit.

43. The apparatus of claim 42 wherein the voltage measurement comprises a first comparator comprising a first input coupled to the first and second capacitors, a second input coupled to a first reference voltage, and an output coupled to a processor.

44. The apparatus of claim 43 wherein the voltage measurement further comprises a second comparator comprising a first input coupled to the first and second capacitors, a second input coupled to a second reference voltage, and an output coupled to the processor.

45. The apparatus of claim 42 further comprising a reference buffer coupled intermediate to the switch network and the second capacitor, wherein the reference buffer is configured to charge the second capacitor at a rate substantially greater than the programmable current source.

46. The system of claim 42, wherein the variable capacitor is a mutual capacitor between a first node of the variable capacitor and a drive electrode, the drive electrode configured to provide a variable voltage signal.