INTERNAL VOLTAGE GENERATOR AND METHOD OF GENERATING INTERNAL VOLTAGE

• US 20110156805A1
• Filed: 07/16/2010
• Published: 06/30/2011
• Est. Priority Date: 12/29/2009
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: KWON, Lee Hyun
• Granted Patent: US 8,212,607 B2
• Time in Patent Office: Days
• US Class Current: 327/536
• CPC Class Codes: H02M 1/36 Means for starting or stopping converters
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps

Abstract

An internal voltage generator and a method of generating an internal voltage are disclosed. The internal voltage generator includes: a charge pumping block configured to perform charge pumping base on a period pulse signal to generate an internal voltage, and output the generated internal voltage to an interval voltage terminal; a voltage detection block configured to detect the voltage level of the internal voltage terminal; a driving voltage supply block configured to supply a first power supply voltage or a second power supply voltage having a higher voltage level than the first power supply voltage as a driving voltage, depending on the detection result of the voltage detection block; and a period pulse generation block configured to drive the period pulse signal to the is driving voltage supplied from the driving voltage supply block. The period pulse signal driven by the second power supply voltage has a longer pulsing period than the period pulse signal driven by the first power supply voltage.

Claims

1. An internal voltage generator comprising:

a charge pumping block configured to perform charge pumping base on a period pulse signal to generate an internal voltage and output the generated internal voltage to an interval voltage terminal;

a voltage detection block configured to detect a voltage level of the internal voltage terminal;

a driving voltage supply block configured to supply one of a first power supply voltage and a second power supply voltage as a driving voltage based on a detection result of the voltage detection block, the second power supply voltage having a higher voltage level than the first power supply voltage; and

a period pulse generation block configured to drive the period is pulse signal using the driving voltage supplied from the driving voltage supply block,

wherein the period pulse signal driven by the second power supply voltage has a longer pulsing period than the period pulse signal driven by the first power supply voltage.

2. The internal voltage generator according to claim 1, wherein the voltage detection block detects whether or not the voltage level of the internal voltage terminal reaches a predetermined level which is lower than a target level of the internal voltage terminal.

3. The internal voltage generator according to claim 1, wherein the voltage detection block comprises:

a voltage division unit configured to divide a voltage on the internal voltage terminal; and

a comparison unit configured to compare the divided voltage outputted from the voltage division unit with a reference voltage.

4. The internal voltage generator according to claim 3, wherein the reference voltage is a voltage generated by a band gap reference circuit.

5. The internal voltage generator according to claim 1, wherein the period pulse signal comprises a differential clock signal.

6. A method of generating an internal voltage by performing charge pumping base on a period pulse signal, the method comprising:

performing charge pumping base on the period pulse signal which is driven by a first power supply voltage and a ground voltage during a first interval in which a voltage level of an internal voltage terminal increases to a predetermined voltage level; and

performing charge pumping base on the period pulse signal driven by a second power supply voltage having a higher level than the first power supply voltage and the ground voltage during a second interval in which the voltage level of the internal voltage terminal increases to a target voltage level from the predetermined voltage level and is then maintained to the target voltage level,

wherein the period pulse signal driven by the second power supply voltage and the ground voltage has a longer pulsing period than the period pulse signal driven by the first power supply voltage and the ground voltage.

7. An internal voltage generator comprising:

a charge pumping block configured to perform charge pumping base on a period pulse signal to generate an internal voltage, and output the generated internal voltage to an internal voltage terminal;

a period pulse generation block configured to drive the period pulse signal in response to a clock output enable signal;

a driving voltage supply block configured to supply a first power supply voltage as a driving voltage to the period pulse generation block during an activation interval of a first interval signal, and supply a second power supply voltage as a driving voltage to the period pulse generation block during an activation interval of a second interval signal, the second power supply voltage having a higher voltage level than the first power supply voltage;

a voltage detection block configured to activate and output the clock output enable signal when a voltage level of the internal voltage terminal is lower than a target voltage level; and

an interval signal generation block configured to activate and output the first interval signal during a first interval in which the voltage level of the internal voltage terminal increases to the target voltage level, and activate and output the second interval signal during a second interval in which the voltage level of the internal voltage terminal is maintained to the target voltage level, after the first interval.

8. The internal voltage generator according to claim 7, wherein the period pulse generation block comprises:

an oscillator configured to output a clock signal; and

a clock driver configured to drive the period pulse signal corresponding to the clock signal using the driving voltage supplied from the driving voltage supply block when the clock output enable signal is activated.

9. The internal voltage generator according to claim 7, wherein the driving voltage supply block comprises:

a first voltage supply unit configured to selectively supply the first power supply voltage to the period pulse generation block based on the first interval signal; and

a second voltage supply unit configured to selectively supply the second power supply voltage to the period pulse generation block based on the second interval signal.

10. The internal voltage generator according to claim 7, wherein the period pulse signal comprises a differential clock signal.

11. The internal voltage generator according to claim 7, wherein the voltage detection block comprises:

a voltage division unit configured to divide the voltage of the internal voltage terminal; and

a first comparison unit configured to compare the divided voltage outputted from the voltage division unit with a first reference voltage to output the clock output enable signal.

12. The internal voltage generator according to claim 11, wherein the interval signal generation block comprises a second comparison unit configured to compare the divided voltage with a second reference voltage having a lower voltage level than the first is reference voltage to output the first and second interval signals which have an inverted relation to each other.

13. The internal voltage generator according to claim 12, wherein the first and second reference voltages are voltages generated by a band gap reference circuit.