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Electronic Access Control Device and Management System

  • US 20110156866A1
  • Filed: 03/10/2011
  • Published: 06/30/2011
  • Est. Priority Date: 11/15/1994
  • Status: Abandoned Application
First Claim
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1. A battery-powered electronic-access control system comprising:

  • memory containing at least one stored code;

    a communication port for entering an input code to access the battery-powered electronic-access control system;

    a circuit capable of generating a wake-up signal, the circuit comprising at least a first processor, wherein the first processor is configured to receive an input code;

    wherein the first processor is capable of operating in an awake mode for a period of time in response to receiving the wake-up signal from the circuit, and a sleep mode after the period of time, wherein the sleep mode causes the first processor to operate at a lower power consumption rate than when the first processor is in the awake mode, a second processor being separated from the first processor and entering an awake mode distinguishable from the awake mode for the first processor, the second processor configured to generate a driver output signal to activate a driver circuit to activate a lock actuator in response to the input code matching one of the at least one stored code;

    a communication port operatively connected to one of either the first processor or the second processor, the connected processor receiving a write signal through the communication port, and in response to the write signal,enters a program mode of operation,receives a code through the communication port, andstores the code into the memory to form the one of the at least one stored code when the first processor or the second processor is in the awake mode, and wherein the first processor or the second processor enters the sleep mode thereafter;

    a low-battery detection circuit for measuring a voltage associated with the battery and being initiated by either the first processor or the second processor when in the awake mode; and

    ,wherein the first processor generates a signal to either enable or wake up the second processor to determine if the input code matches said one of the at least one stored code.

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