CAPACITIVE SENSOR SYSTEM WITH NOISE REDUCTION

• US 20110157077A1
• Filed: 09/30/2010
• Published: 06/30/2011
• Est. Priority Date: 06/25/2008
• Status: Active Grant

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: WEI, DAZHI, MARTIN, BRADLEY
• Granted Patent: US 8,941,394 B2
• Time in Patent Office: Days
• US Class Current: 345/174
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: G06F 3/0418 for error correction or compensation, e.g. based on parallax, calibration or alignment
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Abstract

A system for reducing noise when detecting the capacitance value of a capacitor in a touch display that operates in a potentially noisy environment. A capacitance sensor is provided for determining the size of the capacitor in the touch screen display and includes a charging circuit that charges the capacitor and a discharge circuit that resets the charge of the capacitor to substantially zero. A control circuit controls the capacitance sensor and the operation of the charge and discharge circuits in accordance with a predetermined charging/discharging algorithm to resolve the value of the capacitor and output such value in a sampling operation. The operation of the control circuit and the charging/discharging algorithm is subject to errors as a function of the noisy environment, which errors will be reflected in the output value. A noise reduction circuit is provided to modify the operation of the control circuit to reduce noise.

Claims

1. A system for reducing noise when detecting a capacitance value of a capacitor in a touch display that operates in a potentially noisy environment, comprising:

a capacitance sensor for determining a size of the capacitor in the touch screen display and the capacitor sensor including a charging circuit that charges the capacitor and a discharge circuit that resets the charge of the capacitor to substantially zero;

a control circuit that controls the capacitance sensor charging and discharge circuits in accordance with a predetermined charging/discharging algorithm to resolve the value of the capacitor and output such value in a sampling operation;

wherein the control circuit operating in accordance with the charging/discharging algorithm is subject to errors as a function of the noisy environment, which errors will be reflected in the output value; and

noise reduction circuitry for modifying the operation of the control circuit to reduce noise.

2. The system of claim 1, wherein the system is disposed on an integrated circuit chip in a package and the capacitor is external thereto.

3. A system disposed on an integrated circuit for reducing noise when detecting a capacitance value of a capacitor external to the integrated circuit in a touch display that operates in a potentially noisy environment, comprising:

a capacitance sensor for determining a size of the capacitor in the touch screen display and the capacitor sensor including a charging circuit that charges the capacitor and a discharge circuit that resets the charge of the capacitor to substantially zero;

a control circuit that controls the capacitance sensor charging and discharge circuits in accordance with a predetermined charging/discharging algorithm to resolve the value of the capacitor and output such value in a sampling operation;

wherein the control circuit operating in accordance with the charging/discharging algorithm is subject to errors as a function of the noisy environment, which errors will be reflected in the output value;

noise reduction circuitry for modifying the operation of the control circuit to reduce noise, wherein the noise is internally generated in the integrated circuit; and

the noise reduction circuitry includes a detector for detecting and determining when the noise has been generated and the noise reduction circuitry modifying the operation of the control circuit during portions of the charging/discharging operation when the noise is above a certain level during such portions.

4. The system of claim 3, wherein the noise reduction circuitry is operable to modify the operation of the charging/discharging operation during charging.

5. The system of claim 4, wherein the integrated circuit chip has external ports that can be driven by functional circuitry disposed on the integrated circuit chip and wherein the noise reduction circuitry includes:

a state detector for detecting a logic state change on a driven one of the external ports;

a controller for determining if the detected logic state occurred during at least a portion of the charging operation of the capacitor or the discharging operation of the capacitor; and

the controller modifying the operation of the control circuit in response to the determination that the detected logic state change occurred during such portion.

6. The system of claim 5, wherein the controller determines if a logic state change occurred during a charging operation of the capacitor.

7. The system of claim 5, wherein the capacitance sensor comprises a Successive Approximation Register (SAR) analog-to-digital converter (ADC) of a defined bit length that charges and discharges the capacitor with the controller during the execution of an associated SAR algorithm for testing each bit of the ADC to output a digital value as the resolved value of the capacitor.

8. The system of claim 7, wherein the controller modifies the operation of the control circuit by setting the output value of the ADC to a predetermined value.

9. The system of claim 4, further comprising a configuration device for configuring the operation of the controller to determine if the detected logic state change occurred on a selected one or selected ones of the external ports, wherein the configuration device is user programmable.

10. A system disposed on an integrated circuit for reducing noise when detecting a capacitance value of a capacitor external to the integrated circuit in a touch display that operates in a potentially noisy environment, comprising:

a capacitance sensor for determining a size of the capacitor in the touch screen display and the capacitor sensor including a charging circuit that charges the capacitor and a discharge circuit that resets the charge of the capacitor to substantially zero;

a control circuit that controls the capacitance sensor charging and discharge circuits in accordance with a predetermined charging/discharging algorithm to resolve the value of the capacitor and output such value in a sampling operation;

wherein the control circuit operating in accordance with the charging/discharging algorithm is subject to errors as a function of the noisy environment, which errors will be reflected in the output value; and

noise reduction circuitry for modifying the operation of the control circuit to reduce noise;

wherein the charging and discharge circuits operate to deliver a bit value in a SAR operation in accordance with the SAR algorithm of the ADC having a fixed bit length and resolution, the control circuit operable to control the charging circuit and the discharge circuit to successively charge and discharge the capacitor in accordance with a SAR operation and the noise reduction circuitry is operable to vary the resolution of the SAR operation as a function of noise.

11. The system of claim 10, wherein the integrated circuit chip includes a processor wherein the processor operates to evaluate successive resolved values of the capacitor to determine if the capacitor is in a noisy environment and generates a modified resolution for the ADC operation.

12. The system of claim 11, wherein the processor is configurable to scan a plurality of the capacitors in the touch screen in accordance with a scanning algorithm and wherein the resolution of the ADC is varied as a function of an application running on the processor.

13. The system of claim 10, wherein the SAR operation is operable to test each bit of the ADC from an MSB to an LSB and wherein the operation of modifying the resolution of the ADC detects a predetermined number of LSBs for a bit length of the ADC.

14. The system of claim 11, wherein the application is a function of location of the capacitor on the display.

15. The system of claim 10, wherein the noise is a result of physical movement of the display.

16. A system disposed on an integrated circuit for reducing noise when detecting a capacitance value of a capacitor external to the integrated circuit in a touch display that operates in a potentially noisy environment, comprising:

a capacitance sensor for determining a size of the capacitor in the touch screen display and the capacitor sensor including a charging circuit that charges the capacitor and a discharge circuit that resets the charge of the capacitor to substantially zero;

a control circuit that controls the capacitance sensor charging and discharge circuits in accordance with a predetermined charging/discharging algorithm to resolve the value of the capacitor and output such value in a sampling operation;

wherein the control circuit operating in accordance with the charging/discharging algorithm is subject to errors as a function of the noisy environment, which errors will be reflected in the output value; and

noise reduction circuitry for modifying the operation of the control circuit to reduce noise,

wherein the discharge circuit includes;

a first discharge circuit for discharging the capacitor through a low impedance path to ground;

a second discharge circuit for discharging the capacitor through a high impedance path to ground; and

the noise reduction circuitry including timing circuitry to control the first and second discharge circuitry to first discharge the capacitor during a discharge operation through the low impedance path to remove a substantial portion of charge therefrom followed by discharging the capacitor through the high impedance path such that the second discharge circuit operates as a low pass filter to remove high frequency external noise from the capacitor.

17. The system of claim 16, wherein the noise is high frequency noise generated on a bottom plate of the capacitor connected to external ground external to the display.

18. The system of claim 16, wherein:

the first discharge circuit comprises a first transistor for discharging the capacitor to ground by connecting the top plate of the capacitor opposite the bottom plate thereof to internal ground internal to the display; and

the second discharge circuit comprising a resistor in series with a second transistor, the second transistor for discharging the top plate of the capacitor through the series resistor to internal ground.

19. The system of claim 16, wherein:

the first discharge circuit comprises a first transistor for discharging the capacitor to ground by connecting the top plate of the capacitor opposite the bottom plate thereof to internal ground; and

the second discharge circuit comprising a second transistor for discharging the capacitor to ground by connecting the top plate of the capacitor opposite the bottom plate thereof to ground, the second transistor having a substantially higher on impedance than the first transistor.

20. The system of claim 16 wherein the first discharge circuit operates for a shorter period of time in the second discharge circuit.