SEMICONDUCTOR DEVICE

• US 20110157961A1
• Filed: 12/27/2010
• Published: 06/30/2011
• Est. Priority Date: 12/28/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kato, Kiyoshi, Koyama, Jun, Yamazaki, Shunpei
• Granted Patent: US 8,400,817 B2
• Time in Patent Office: Days
• US Class Current: 365/149
• CPC Class Codes: G11C 16/0425 comprising cells containing a merged floating gate and select transistor
• CPC Class Codes: G11C 16/0433 comprising cells containing a single floating gate transistor and one or more separate select transistors
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H10B 12/00 Dynamic random access memory [DRAM] devices
• CPC Class Codes: H10B 41/00 Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
• CPC Class Codes: H10B 41/70 the floating gate being an electrode shared by two or more components

Abstract

The semiconductor device includes a source line, a bit line, a first signal line, a second signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line, a second driver circuit electrically connected to the first signal line, a third driver circuit electrically connected to the second signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material.

Claims

1. A semiconductor device comprising:

a source line;

a bit line;

a first signal line;

a second signal line;

a word line;

a memory cell array comprising a plurality of memory cells;

a first driver circuit electrically connected to the source line and the bit line;

a second driver circuit electrically connected to the first signal line;

a third driver circuit electrically connected to the second signal line; and

a fourth driver circuit electrically connected to the word line,

wherein one of the plurality of memory cells comprises;

a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode;

a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and

a capacitor comprising a first terminal and a second terminal,

wherein the second transistor comprises an oxide semiconductor material,

wherein the first gate electrode, one of the second source electrode and the second drain electrode, and the first terminal of the capacitor are electrically connected to one another,

wherein the source line and the first source electrode are electrically connected to each other,

wherein the bit line and the first drain electrode are electrically connected to each other,

wherein the first signal line and the other of the second source electrode and the second drain electrode are electrically connected to each other,

wherein the second signal line and the second gate electrode are electrically connected to each other, and

wherein the word line and the second terminal of the capacitor are electrically connected to each other.

2. The semiconductor device according to claim 1, wherein the first transistor comprises a semiconductor material other than an oxide semiconductor.

3. The semiconductor device according to claim 1,

wherein the first transistor comprises:

a channel formation region comprising a semiconductor material other than an oxide semiconductor;

impurity regions provided with the channel formation region sandwiched therebetween;

a gate insulating layer over the channel formation region;

the first gate electrode over the gate insulating layer; and

the first source electrode and the first drain electrode electrically connected to the impurity regions.

4. The semiconductor device according to claim 1,

wherein the second transistor comprises:

the second source electrode and the second drain electrode;

a channel formation region comprising the oxide semiconductor material and electrically connected to the second source electrode and the second drain electrode;

a gate insulating layer over the channel formation region; and

the second gate electrode over the gate insulating layer.

5. The semiconductor device according to claim 4,

wherein the capacitor comprises:

the second source electrode or the second drain electrode;

the gate insulating layer; and

an electrode over the gate insulating layer.

6. The semiconductor device according to claim 1, wherein the oxide semiconductor material comprises indium and gallium.

7. The semiconductor device according to claim 1, further comprising a reading circuit electrically connected to the bit line.

8. The semiconductor device according to claim 7,

wherein the reading circuit comprises a third transistor and a clocked inverter,

wherein a third gate electrode and one of a third source electrode and a third drain electrode of the third transistor are electrically connected to a high potential power source, and

wherein the clocked inverter and the other of the third source electrode and the third drain electrode are electrically connected to each other.

9. The semiconductor device according to claim 1, wherein the plurality of memory cells are electrically connected in parallel between the source line and the bit line.

10. An electronic device comprising the semiconductor device according to claim 1, wherein the electronic device is one selected from the group consisting of a computer, a mobile phone, a portable information terminal, a digital camera, a digital video camera, an electronic paper, and a television device.

11. A semiconductor device comprising:

a first line;

a second line;

a third line;

a fourth line;

a fifth line;

a first driver circuit electrically connected to the first line and the fifth line;

a second driver circuit electrically connected to the second line;

a third driver circuit electrically connected to the third line;

a fourth driver circuit electrically connected to the fourth line; and

a memory cell array comprising a first memory cell, a second memory cell, and a third memory cell, each of the first memory cell, the second memory cell, and the third memory cell comprising;

a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode;

a second transistor comprising a second gate electrode a second source electrode and a second drain electrode; and

a capacitor comprising a first terminal and a second terminal,

wherein the second transistor comprises an oxide semiconductor material, and

wherein the first gate electrode, one of the second source electrode and the second drain electrode, and the first terminal are electrically connected to one another,

wherein one of the first source electrode and the first drain electrode of the first memory cell and one of the first source electrode and the first drain electrode of the second memory cell are electrically connected to the first line,

wherein one of the second gate electrode and the other of the second source electrode and the second drain electrode of the first memory cell and one of the second gate electrode and the other of the second source electrode and the second drain electrode of the second memory cell are electrically connected to the second line,

wherein the other of the second gate electrode and the other of the second source electrode and the second drain electrode of the first memory cell and the other of the second gate electrode and the other of the second source electrode and the second drain electrode of the third memory cell are electrically connected to the third line,

wherein the second terminal of the first memory cell and the second terminal of the third memory cell are electrically connected to the fourth line, and

wherein the other of the first source electrode and the first drain electrode of the first memory cell and the of the first source electrode and the first drain electrode of the second memory cell are electrically connected to the fifth line.

12. The semiconductor device according to claim 11, wherein the first transistor comprises a semiconductor material other than an oxide semiconductor.

13. The semiconductor device according to claim 11,

wherein the first transistor comprises:

a channel formation region comprising a semiconductor material other than an oxide semiconductor;

impurity regions provided with the channel formation region sandwiched therebetween;

a gate insulating layer over the channel formation region;

the first gate electrode over the gate insulating layer; and

the first source electrode and the first drain electrode electrically connected to the impurity regions.

14. The semiconductor device according to claim 11,

wherein the second transistor comprises:

the second source electrode and the second drain electrode above the first transistor;

a channel formation region comprising the oxide semiconductor material and electrically connected to the second source electrode and the second drain electrode;

a gate insulating layer over the channel formation region; and

the second gate electrode over the gate insulating layer.

15. The semiconductor device according to claim 14,

wherein the capacitor comprises:

the second source electrode or the second drain electrode;

the gate insulating layer; and

an electrode over the gate insulating layer.

16. The semiconductor device according to claim 11, wherein the oxide semiconductor material comprises indium and gallium.

17. The semiconductor device according to claim 11, wherein the first driver circuit comprises a reading circuit electrically connected to the first line.

18. The semiconductor device according to claim 17,

wherein the reading circuit comprises a third transistor and a clocked inverter,

wherein a third gate electrode and one of a third source electrode and a third drain electrode of the third transistor are electrically connected to a high potential power source, and

wherein the clocked inverter and the other of the third source electrode and the third drain electrode are electrically connected to each other.

19. An electronic device comprising the semiconductor device according to claim 11, wherein the electronic device is one selected from the group consisting of a computer, a mobile phone, a portable information terminal, a digital camera, a digital video camera, an electronic paper, and a television device.