Silicon Microphone Transducer

• US 20110158439A1
• Filed: 12/16/2010
• Published: 06/30/2011
• Est. Priority Date: 12/31/2009
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Shih, Wei-Yan, Barron, Lance W., Denison, Marie, Goodlin, Brian E.
• Granted Patent: US 8,617,960 B2
• Time in Patent Office: Days
• US Class Current: 381/174
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H04R 19/04 Microphones H04R19/01 takes precedence

Abstract

A capacitive microphone transducer integrated into an integrated circuit includes a fixed plate and a membrane formed in or above an interconnect region of the integrated circuit. A process of forming an integrated circuit containing a capacitive microphone transducer includes etching access trenches through the fixed plate to a region defined for the back cavity, filling the access trenches with a sacrificial material, and removing a portion of the sacrificial material from a back side of the integrated circuit.

Claims

1. An integrated circuit containing a capacitive microphone transducer, comprising:

a substrate;

a first interconnect region formed on a top surface of said substrate;

a fixed plate formed on a top surface of said first interconnect region;

a first membrane layer formed over said fixed plate, such that a microphone transducer cavity exists between said first membrane layer and said fixed plate;

a backside cavity formed in said substrate extending to a bottom surface of said substrate; and

access trenches formed through said first interconnect region into said substrate, such that said access trenches connect said microphone transducer cavity with said backside cavity.

2. The integrated circuit of claim 1, in which said first membrane layer is formed concurrently with liner metal elements of interconnects in said integrated circuit.

3. The integrated circuit of claim 1, in which said first membrane layer includes material selected from the group consisting of tantalum nitride, titanium nitride, titanium aluminum, aluminum, aluminum with copper, silicon nitride, silicon oxy-nitride, silicon carbide, silicon nitride carbide, and silicon oxy-nitride carbide.

4. The integrated circuit of claim 1, in which said first membrane layer includes a stress relief configuration.

5. The integrated circuit of claim 1, further including a second membrane layer formed on a top surface of said first membrane layer, such that lateral edges of said second membrane layer do not extend to lateral edges of said first membrane layer.

6. The integrated circuit of claim 5, in which said second membrane layer is formed concurrently with elements of interconnects in said integrated circuit.

7. The integrated circuit of claim 6, in which said second membrane layer is selected from the group consisting of copper, aluminum, and aluminum with copper.

8. The integrated circuit of claim 1, in which said fixed plate is formed concurrently with elements of interconnects in said integrated circuit.

9. The integrated circuit of claim 1, in which said substrate includes:

a base layer;

an etch stop layer formed on said base layer; and

a top layer formed on said etch stop layer;

such that said backside cavity extends through said base layer; and

such that said access trenches extend through said top layer.

10. A capacitive microphone transducer, comprising:

a fixed plate formed on a top surface of an interconnect region of an integrated circuit, said fixed plate being formed concurrently with interconnect elements of said integrated circuit;

a first membrane layer formed over said fixed plate, such that a microphone transducer cavity exists between said first membrane layer and said fixed plate;

a second membrane layer formed on a top surface of said first membrane layer;

a backside cavity formed in a substrate of said integrated circuit, said backside cavity extending to a bottom surface of said substrate; and

access trenches formed through said interconnect region into said substrate, such that said access trenches connect said microphone transducer cavity with said backside cavity.

11. The capacitive microphone transducer of claim 10, in which lateral edges of said second membrane layer do not extend to lateral edges of said first membrane layer.

12. A process of forming an integrated circuit containing a capacitive microphone transducer, comprising the steps:

providing a substrate;

forming a first interconnect region on a top surface of said substrate;

forming a fixed plate on a top surface of said first interconnect region;

forming access trenches through said first interconnect region into said substrate;

forming a sacrificial fill region of sacrificial material above said fixed plate;

forming a first membrane layer on a top surface of said sacrificial fill region;

forming a sacrificial protective layer of sacrificial material on a top surface of said second membrane layer;

forming a backside cavity in said substrate, said backside cavity extending from a bottom surface of said substrate to said access trenches;

removing a portion of said sacrificial material in said access trenches by a process of etching from a back side of said integrated circuit; and

removing said sacrificial material from said sacrificial fill region.

13. The process of claim 12, in which said first membrane layer is formed concurrently with liner metal elements of interconnects in said integrated circuit.

14. The process of claim 12, in which said first membrane layer is selected from the group consisting of tantalum nitride, titanium nitride, titanium aluminum, aluminum, aluminum with copper, silicon nitride, silicon oxy-nitride, silicon carbide, silicon nitride carbide, and silicon oxy-nitride carbide.

15. The process of claim 12, in which said first membrane layer is formed so as to include a stress relief configuration.

16. The process of claim 12, further including forming a second membrane layer on on a top surface of said first membrane layer, so that lateral edges of said second membrane layer do not extend to lateral edges of said first membrane layer.

17. The process of claim 16, in which said second membrane layer is formed concurrently with elements of interconnects in said integrated circuit.

18. The process of claim 17, in which said second membrane layer is selected from the group consisting of copper, aluminum, and aluminum with copper.

19. The process of claim 12, in which said fixed plate is formed concurrently with elements of interconnects in said integrated circuit.

20. The process of claim 12, in which:

said substrate includes;

a base layer;

an etch stop layer formed on said base layer; and

a top layer formed on said etch stop layer;

said step of forming said backside cavity is performed so that said backside cavity extends through said base layer; and

said step of forming said access trenches is performed so that said access trenches extend through said top layer.