Vertical Light-Emitting Diode and Manufacture Method Thereof

• US 20110163293A1
• Filed: 07/30/2010
• Published: 07/07/2011
• Est. Priority Date: 07/31/2009
• Status: Active Grant

• Current Assignee: Tekcore Co Limited (Tekcore)
• Original Assignee: Tekcore Co Limited (Tekcore)
• Inventors: Yeh, Nien-Tze, Lee, Shih-Hung, Lin, Wen-Hsien, Chung, Wei-Jung, Li, Cheng-Hsien
• Granted Patent: US 8,378,376 B2
• Time in Patent Office: Days
• US Class Current: 257/13
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/42 Transparent materials

Abstract

The present application describes a vertical light-emitting diode (VLED) and its manufacture method that use the combination of a reflective layer, a transparent conducting layer and transparent dielectric layer as structural layers for promoting uniform current distribution and increasing light extraction. In the VLED, a transparent conducting layer is formed on a first outer surface of a stack of multiple group III nitride semiconductor layers. A transparent dielectric layer is then formed on a side of the transparent conducting layer opposite the side of the multi-layer structure. A first electrode structure is then formed on the transparent dielectric layer in electrical contact with the transparent conducting layer via a plurality of contact windows patterned through the transparent dielectric layer. The transparent conducting layer and the transparent dielectric layer are used as structural layers for improving light extraction.

Claims

1. A vertical light-emitting diode comprising:

a multi-layer structure comprising a plurality of group III-nitride semiconductor compound layers, wherein the multi-layer structure has a first outer surface and a second outer surface opposite to the first outer surface;

a transparent conducting layer located on the first outer surface;

a transparent dielectric layer in contact with the transparent conducting layer on a side opposite to the side of the multi-layer structure, wherein the transparent dielectric layer includes a plurality of contact windows;

a first electrode structure located on the transparent dielectric layer and in contact with the transparent conducting layer via the contact windows; and

a second electrode structure located on the second outer surface.

2. The vertical light-emitting diode of claim 1, wherein the first electrode structure comprises a reflective layer.

3. The vertical light-emitting diode of claim 1, wherein the first electrode structure comprises a conducting substrate.

4. The vertical light-emitting diode of claim 3, wherein the conducting substrate is a metallic or semiconductor substrate.

5. The vertical light-emitting diode of claim 1, wherein the transparent dielectric layer contains SiO₂, Si₃N₄, or TiO₂.

6. The vertical light-emitting diode of claim 1, wherein the transparent dielectric layer has a thickness smaller than about 2 microns.

7. The vertical light-emitting diode of claim 1, wherein the transparent conducting layer has a thickness smaller than about 4000 Angstroms.

8. The vertical light-emitting diode of claim 1, wherein the multi-layer structure comprises a multiple quantum well structure.

9. A method for manufacturing a vertical light-emitting diode, comprising:

forming a multi-layer structure on a substrate, wherein the multi-layer structure comprises a plurality of group III nitride semiconductor compound layers;

forming a transparent conducting layer on the multi-layer structure;

forming a transparent dielectric layer on a side of the transparent conducting layer opposite to the side of the multi-layer structure;

forming a plurality of contact windows through the transparent dielectric layer;

forming a first electrode structure on the transparent dielectric layer, wherein the first electrode structure is in electrical contact with the transparent conducting layer via the contact windows;

removing the substrate to expose a surface of the multi-layer structure; and

forming a second electrode structure on the exposed surface of the multi-layer structure.

10. The method of claim 9, wherein the step of forming the first electrode structure comprises forming a reflective layer on the transparent dielectric layer.

11. The method of claim 10, wherein the step of forming the first electrode structure further comprises forming a metal layer on the reflective layer.

12. The method of claim 11, wherein the step of forming the first electrode structure further comprises placing a conducting substrate on the metal layer.

13. The method of claim 12, wherein the conducting substrate is a metallic or semiconductor substrate.

14. The method of claim 9, wherein the transparent dielectric layer contains SiO₂, Si₃N₄, or TiO₂.

15. The method of claim 9, wherein the transparent dielectric layer has a thickness smaller than about 2 microns.

16. The method of claim 9, wherein the transparent conducting layer has a thickness smaller than about 4000 Angstroms.

17. The method of claim 9, wherein the multi-layer structure comprises a multiple quantum well structure.