Semiconductor Device and Manufacturing Method Thereof

• US 20110163311A1
• Filed: 11/17/2010
• Published: 07/07/2011
• Est. Priority Date: 09/29/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Honda, Tatsuya, Akimoto, Kengo, Sone, Norihito
• Granted Patent: US 8,466,463 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/428 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/465 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/469
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Claims

1-38. -38. (canceled)

39. A semiconductor device comprising:

an oxide semiconductor layer including a channel region; and

a gate electrode adjacent to the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor material added with at least one element selected from the group consisting of nitrogen, phosphorus, arsenic, antimony, bismuth, fluorine, chlorine, bromine, and iodine.

40. The semiconductor device according to claim 39 wherein the oxide semiconductor layer has a crystalline state.

41. The semiconductor device according to claim 39 wherein the oxide semiconductor layer has an amorphous state at least partly.

42. The semiconductor device according to claim 39 wherein the oxide semiconductor layer has a state in which both an amorphous structure and a crystalline structure exist.

43. The semiconductor device according to claim 39 wherein the gate electrode is formed over the oxide semiconductor layer.

44. The semiconductor device according to claim 39 wherein the oxide semiconductor layer is formed over the gate electrode.

45. A semiconductor device comprising:

an oxide semiconductor layer including a channel region; and

a gate electrode adjacent to the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor material added with nitrogen.

46. The semiconductor device according to claim 45 wherein the oxide semiconductor layer has a crystalline state.

47. The semiconductor device according to claim 45 wherein the oxide semiconductor layer has an amorphous state at least partly.

48. The semiconductor device according to claim 45 wherein the oxide semiconductor layer has a state in which both an amorphous structure and a crystalline structure exist.

49. The semiconductor device according to claim 45 wherein the gate electrode is formed over the oxide semiconductor layer.

50. The semiconductor device according to claim 45 wherein the oxide semiconductor layer is formed over the gate electrode.

51. The semiconductor device according to claim 45 wherein the nitrogen functions as an acceptor impurity.

52. A semiconductor device comprising:

an oxide semiconductor layer including a channel region; and

a gate electrode adjacent to the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises indium, gallium, zinc and nitrogen.

53. The semiconductor device according to claim 52 wherein the oxide semiconductor layer has a crystalline state.

54. The semiconductor device according to claim 52 wherein the oxide semiconductor layer has an amorphous state at least partly.

55. The semiconductor device according to claim 52 wherein the oxide semiconductor layer has a state in which both an amorphous structure and a crystalline structure exist.

56. The semiconductor device according to claim 52 wherein the gate electrode is formed over the oxide semiconductor layer.

57. The semiconductor device according to claim 52 wherein the oxide semiconductor layer is formed over the gate electrode.

58. The semiconductor device according to claim 52 wherein the nitrogen functions as an acceptor impurity.

59. A display device comprising:

a transistor; and

a pixel electrode electrically connected to the transistor, the transistor comprising;

an oxide semiconductor layer including a channel region; and

a gate electrode adjacent to the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor material added with at least one element selected from the group consisting of nitrogen, phosphorus, arsenic, antimony, bismuth, fluorine, chlorine, bromine, and iodine.

60. The display device according to claim 59 wherein the oxide semiconductor layer has a crystalline state.

61. The display device according to claim 59 wherein the oxide semiconductor layer has an amorphous state at least partly.

62. The display device according to claim 59 wherein the oxide semiconductor layer has a state in which both an amorphous structure and a crystalline structure exist.

63. The display device according to claim 59 wherein the gate electrode is formed over the oxide semiconductor layer.

64. The display device according to claim 59 wherein the oxide semiconductor layer is formed over the gate electrode.

65. The display device according to claim 59 wherein the display device is a liquid crystal device.

66. The display device according to claim 59 wherein the display device is an electroluminescence device.

67. A display device comprising:

a transistor; and

a pixel electrode electrically connected to the transistor, the transistor comprising;

an oxide semiconductor layer including a channel region; and

a gate electrode adjacent to the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises an In—

Ga—

Zn—

O based oxide semiconductor material added with nitrogen.

68. The display device according to claim 67 wherein the oxide semiconductor layer has a crystalline state.

69. The display device according to claim 67 wherein the oxide semiconductor layer has an amorphous state at least partly.

70. The display device according to claim 67 wherein the oxide semiconductor layer has a state in which both an amorphous structure and a crystalline structure exist.

71. The display device according to claim 67 wherein the gate electrode is formed over the oxide semiconductor layer.

72. The display device according to claim 67 wherein the oxide semiconductor layer is formed over the gate electrode.

73. The display device according to claim 67 wherein the nitrogen functions as an acceptor impurity.

74. The display device according to claim 67 wherein the display device is a liquid crystal device.

75. The display device according to claim 67 wherein the display device is an electroluminescence device.

76. A display device comprising:

a transistor; and

a pixel electrode electrically connected to the transistor, the transistor comprising;

an oxide semiconductor layer including a channel region; and

a gate electrode adjacent to the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises indium, gallium, zinc and nitrogen.

77. The display device according to claim 76 wherein the oxide semiconductor layer has a crystalline state.

78. The display device according to claim 76 wherein the oxide semiconductor layer has an amorphous state at least partly.

79. The display device according to claim 76 wherein the oxide semiconductor layer has a state in which both an amorphous structure and a crystalline structure exist.

80. The display device according to claim 76 wherein the gate electrode is formed over the oxide semiconductor layer.

81. The display device according to claim 76 wherein the oxide semiconductor layer is formed over the gate electrode.

82. The display device according to claim 76 wherein the nitrogen functions as an acceptor impurity.

83. The display device according to claim 76 wherein the display device is a liquid crystal device.

84. The display device according to claim 76 wherein the display device is an electroluminescence device.