DESIGN TOOL FOR THE TYPE AND FORM OF A CIRCUIT PRODUCTION

• US 20110167399A1
• Filed: 05/07/2008
• Published: 07/07/2011
• Est. Priority Date: 05/08/2007
• Status: Active Grant

• Current Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V., Technische Universitã¤T Berlin (Tu)
• Original Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V., Technische Universitã¤T Berlin (Tu)
• Inventors: Schroeder, Michael, Kuefer, Karl-Heinz, Polityko, Dmitry-David
• Granted Patent: US 8,645,900 B2
• Time in Patent Office: Days
• US Class Current: 716/122
• CPC Class Codes: G06F 30/30 Circuit design

Abstract

The invention relates to a method for influencing a selecting a “type and form of a circuit implementation” in at least one layer (L1,L2) in a given integration task for an integrated circuit or many thereof aggregated in a wafer composite, a module on a 2-dimensional carrier substrate, or a compact module. A plurality of electric or electronic components is spatially arranged and electrically conductively to be connected. To this end a plurality of completed solutions x (5;5a,5b) are stored and available in a database (10), and each of the completed solutions includes a set of properties, wherein each set includes at least one of the following properties for the given integration task: a technology for integration, a package or installation size, a number of layers (physical layers) for conductors or line in a vertical direction and a line length or conductor length. The completed solutions (5) stored in the database (10) of the given integration task define a destination space (40), from which a solution (5b) is selectable by means of operating elements (21,22), which solution determines type & form of the circuit implementation as a result of the given integration task, and aggregates the plurality of electric and electronic components in one of a plurality of integration technologies. In this way, the design time can be reduced.

Claims

1. A method of at least contributing to a selection of a type and form of a circuit implementation in at least one layer for a given integration task concerning one of

an integrated circuit or many thereof combined in a wafer composite;

a module on an area-like carrier substrate; and

a compact module;

wherein

(1) a plurality of electric or electronic components are to be spatially placed and electrically connected with each other;

(2) storing a plurality of completed solutions in a database, and each of the completed solutions comprises a set of properties, and each set includes at least the following properties for the given integration task;

a technology of integration;

a package or installation size;

a number of physical layers for conductive paths or conductors in a vertical direction; and

a wire or conductor path length;

(3) using said completed solutions stored in the data base of the given integration task to define a destination space, and selecting a solution (5b) therefrom by at least two operating elements of a display device (20), said solution determining type &

form of the circuit implementation as a result of the given integration task, and aggregating said plurality of electric and electronic components in one of a plurality of integration technologies.

2. The method of claim 1, wherein said selected solution is represented in a real design space, whereby a real representation of an actual spatial arrangement of the components and electric connections thereof are illustrated on a display device.

3. The method of claim 2, wherein each physical layer is represented separately.

4. The method of claim 2, wherein at least a single section of the type &

form of the circuit implementation is represented on the display device.

5. The method of claim 1, wherein a different one of said plurality of completed solutions is selectably represented, which is represented in a real design space on the representation device instead of the previously represented solution.

6. The method of claim 1, wherein all solutions from the destination space are concurrently displayed on the display device (20), at least with respect to two properties on the second of said two operating elements.

7. The method of claim 1, wherein all solutions from the destination space are concurrently represented on the display device, with at least some properties on the first of said two operating elements.

8. The method of claim 1, wherein the integration is finally effected with only one integration technology as used integration technology, but wherein several different integration technologies are included in the pre-stored completed solutions.

9. The method of claims 1 or 2, wherein a set of control instructions (31) for production tools is outputted for a solution represented in said real design space (23).

10. The method of claim 1, wherein in the integration task “

carrier substrate”

as integration of discrete components on a 2-dimensional circuit substrate (71,72)

a substrate technology is applied including laminate, ceramic or thin film.

11. The method of claim 1, wherein for the integration task “

compact module”

an interconnect technology including

flip-chip, wire bonding or TAB

is applied including one of the following vertical duplicates

stacking

folded with a flexible conductor substrate.

12. The method of claim 1, wherein for the integration task “

integrated circuit”

a semiconductor technology is applied.

13. The method of claim 11, wherein the compact module is a micro circuit (CoB).

14. The method of claim 1, wherein for the integration task “

compact module”

or “

integrated circuit”

an integration technology of embedding is applied including

a hybrid technology or a thick film technology, including an integration of passive and active components in the substrate or as integrating part of a two-dimensional substrate.

15. The method of claim 1, including at least two layers as physical layers.

16. The method of claim 15, including at least three of four or more layers as physical layers.

17. The method of claim 15, including at least two physical layers as conductive connection layers.

18. The method of claim 17, including said at least two physical layers as conductive connection layers assigned to a respective physical layer as two-dimensional circuit substrate or substrate layer.

19. The method of claim 7, wherein in the stored completed solutions in the database there are stored more properties in each set, as are selectable in the operating elements by view.

20. The method of claim 19, wherein in the stored solutions the properties that are not to be represented on the operating elements are individually blockable, wherein

(a) a blocked property relates to all solutions and in each set the same property is blocked;

(b) the non-blocked properties determine the scale numbering in one of the operating elements.

21. The method of claim 1, wherein said plurality of completed solutions comprises more than 10 stored solutions.

22. The method of claim 1, wherein the representation in the real design space comprises at least the following:

the components of the integration task;

position and orientation of each of the components in one physical layer of the selected solution.

23. The method of claim 1, wherein each of said plurality of stored solutions (5) comprises as a further property

the number and position of thermal hot spots.

24. The method of claim 1, wherein each stored solution comprises as a further property an indication about one of

a signal propagation time, or a signal delay and a signal integrity.

25. The method of claim 1, wherein each of the stored solutions comprises a predicted reliability as a further property.

26. The method of claim 1, wherein each of the stored solutions completed solutions comprises as a further property a position presetting for a subset of said plurality of electric or electronic components.

27. The method of claim 1, wherein each of the stored solutions comprises the impedance of the conductors for connecting the electric or electronic components as a further property.

28. The method of claim 1, wherein each of the solutions comprises as a further property an indication about one of a separation of various supply grids, a potential equalization between several supply grids and a current capability of at least one supply line of a supply grid.

29. The method of claim 1, wherein each set of properties comprises as a further property as pre-calculated completed solution one, two or more of the following properties

a placing condition for at least some of the components;

a timing indication for at least one used signal;

a thermal indication; and

a property of the overall circuit.

30. The method of claim 1, wherein each stored solution comprises as a further property in the set of properties for a number of at least two layers of conductors or lines, comprises a number of vertical wirings or vias.

31. The method of claim 1, wherein each solution comprises a further property as wiring density.

32. The method of claim 1, wherein each solution comprises a further property as wiring capacitance.

33. The method of claim 1, wherein said plurality of electric or electronic components also comprises electro-mechanical components.

34. The method of claim 1, wherein the change from one completed solution to another completed solution, both of which are available in the database in a pre-calculated manner and are parts of the destination space, is effected by changing a property of the set of properties.

35. The method of claim 2, wherein in the first section of the representation device the sets of properties are visibly represented, and a respective scale represents only one property of the set, and on said respective scale the same property values of the completed solutions stored in the database are individually visible.

36. The method of claim 35, wherein the several scales extend in parallel to each other.

37. The method of claim 35, wherein on one of the scales at least two different integration technologies are represented, as one of the properties from each set of properties.

38. The method of claim 1, wherein several technologies of integration are stored in the completed solutions, but only few thereof are enabled or have been enabled for the representation in the first operating element.

39. The method of claim 1, wherein in a second section of the display device at least two properties are represented versus each other, thereby restrictedly comparingly or comparably confronting in the second section the property values of the two properties of all solutions stored in the database.

40. The method of claim 39, wherein only two or only three properties are represented versus each other in the second section.

41. The method of claim 2, wherein in a third section of the display device no more than one physical image is represented as a design of an electric/electronic system.

42. The method of claim 2, comprising three sections which are non-overlappingly represented on the display device.

43. The method of claim 1, wherein for the purpose of a constraint management the set of properties is supplemented by one or more of the following properties, for each of the stored solutions

number of violations of a preset timing behavior;

number of violations of a preset temperature profile;

for representation versus a another property in a second section of the representation display device as an operating element.

44. The method of claim 1, wherein for the purpose of a constraint management each set of properties in each of the stored solutions is supplemented by the following property

number of extracted RC values from many present nets in the same stored solution in the destination space,

for representation versus another property in the second section of the display device as operating element.

45. The method of claim 1, wherein for the purpose of a constraint management each set of properties is supplemented by one or more of the following properties, for each of the stored solutions

number and size of deviations from preset line lengths in the sense of a differential line routing;

number and strength of a signal cross talk;

number and strength of signal distortions in the sense of preserving signal integrity;

number and strength of deviations from preset line impedances;

for representation versus another property in the second section of the display device as operating element.

46. The method of claim 43, wherein said another property in the second section from the set of represented properties is switchable or selectable.

47. The method of claim 1, wherein a graphic-interactive function for controlling the representation of the solutions stored in the destination space is provided, for restricting the available stored solutions to only few represented and highlighted solutions.

48. The method of claim 47, wherein in the second section a continuous part between two spaced, non-intersecting and pre-determinable functions is provided, for selecting only such solutions having a property value in said part.

49. The method of claim 39, wherein in an interactive function, from a starting point representing a solution, both represented properties of this solution in a second section of the representation device are concurrently improved to a next solution, wherein a close as possible next solution is determined by calculation, which avoids a significant change with respect to the starting point of each of the two represented properties.

50. The method of claim 1, wherein the set of properties of each solution is supplemented by a further property, which aggregates several other bur comparable properties.

51. The method of claim 47, wherein the set of properties is supplemented by a further property that itself has only a locally restricted meaning.

52. The method of claim 51, wherein said further property with local meaning is intended for a portion of the design or design area of not more than 20%, in particular for local heat generation or local wiring length.

53. The method of claim 1, wherein the spatial arranging for each component comprises as localization “

i”

(B_i) the respective location in space and position;

the respective orientation of the position,

and this indication is also defined for all of the remaining components (B_i=i=1 . . . n).

54. The method of claim 1, wherein the influencing of the selecting is effected for a first design for a given integration task.

55. The method of claim 54, wherein the first design is influenced, but is re-correctable or re-designable later, for determining of the best possible result.

56. The method of claim 1, wherein it is primarily selected with respect to properties in the destination space as technology of the integration.

57. The method of claim 1, wherein said selectable solution represents a best possible result.

58. The method of claim 14, wherein connection lines are visible in the real design space between the represented components.

59. The method of claim 14, wherein contacts for contacting the circuit implementation from outside are visible in the real design space.

60. A method of representing types &

forms of circuit implementations comprising at least one layer for a given integration task comprising one of

an integrated circuit;

a module on a 2-dimensional carrier substrate; and

a compact module;

wherein a plurality of electric or electronic components are spatially arranged and conductively connected to each other;

storing a plurality of completed solutions in a database, each of the completed solutions includes a set of properties, and each set includes at least one of the following properties;

a technology for integration;

a package or installation size;

a number of physical layers for conductors or lines in a vertical direction; and

a line length or conductor path length;

wherein the completed solutions as stored in the database define a destination space, wherefrom a solution is selected so as to be used in a real design space, and

effecting a change from one solution in the destination space to another solution in the destination space, both being available in the database in a pre-calculated manner, and all of the pre-calculated solutions being part of the destination space, by selecting one of the properties from the set of properties of the another solution.

61. The method of claim 60, wherein a selecting of a different wiring length of conductor length or a selecting of a different integration technology results in a changing from said one solution in the destination space to said another solution in the destination space.

62. The method of claim 60, wherein the changing from said one solution in the destination space to said another solution in the destination space is effected independently from a view or an influence of a design of a type &

form of a circuit implementation—

represented in the real design space.

63. The method of claim 60, wherein a representation of all available solutions of the destination space is effected on the representation device so as to enable, initiated by view, the selection of said another solution.

64. (canceled)

65. A Display Representation for influencing a select ion of a “

type &

form of a circuit implementation”

in at least one layer for a given integration task for packaging, wherein a plurality of electric or electronic components (B_i, i=1 . . . n) are to be or are spatially arranged and conductively connected to each other;

having a database, a display device and several visibly represented operating elements (21,22), and

(a) wherein a plurality of completed solutions of the given integration task are stored in the database to defines a destination space, selecting therefrom by view via the several visibly represented operating elements a solution that determines at least a first suitable type &

form of the circuit implementation as a result of the given integration task aggregating the plurality of electric and electronic components in one of a plurality of integration technologies;

(b) representing the selected solution in a real design space, whereby an arrangement of the electric and electronic components aggregated in the integration technology is represented in an arranged manner in the at least one layer.

66. The display of claim 65, wherein each of the plurality of the completed solutions stored in the database includes a set of properties, and for the given integration task each set includes at least one of the following properties

a technology for integration;

a package or installation size;

a number of physical layers for conductors or conducting paths in a vertical direction; and

a line length of said conductors or paths.