ESD PROTECTIVE ELEMENT, SEMICONDUCTOR DEVICE, AND PLASMA DISPLAY

• US 20110169092A1
• Filed: 11/08/2010
• Published: 07/14/2011
• Est. Priority Date: 01/08/2010
• Status: Active Grant

• Current Assignee: Panasonic Semiconductor Solutions Co., Ltd. (Winbond Electronics Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Satou, Yoshinobu, IKUTA, Teruhisa
• Granted Patent: US 8,823,106 B2
• Time in Patent Office: Days
• US Class Current: 257/355
• CPC Class Codes: H01L 27/0259 using bipolar transistors as protective elements
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present invention mainly provides an ESD protective element which can be built in high voltage semiconductor integrated circuit devices without increasing the chip area. An ESD protective element according to one embodiment has a construction comprising a semiconductor layer, a first region of a first conduction type formed in the semiconductor layer, a first region of a second conduction type formed in the semiconductor layer away from the first region of the first conduction type, a second region of the second conduction type formed in the first region of the second conduction type and has a higher impurity concentration than it, and a second region of the first conduction type formed in the second region of the second conduction type and has a high impurity concentration. The first and second regions of the second conduction type are in an electrically floating state.

Claims

1. An ESD protective element providing:

a semiconductor layer;

a first semiconductor region of a first conduction type formed in said semiconductor layer;

a first semiconductor region of a second conduction type formed in said semiconductor layer in proximity or next to said first semiconductor region of the first conduction type;

a second semiconductor region of the second conduction type formed in said first semiconductor region of the second conduction type;

and a second semiconductor region of the first conduction type formed in said second semiconductor region of the second conduction type;

wherein the impurity concentration in said second semiconductor region of the second conduction type is higher than the impurity concentration in said first semiconductor region of the second conduction type, and said first semiconductor region of the second conduction type and said second semiconductor region of the second conduction type are set electrically floating.

2. The ESD protective element according to claim 1, wherein said semiconductor layer is formed on an insulating film installed on a supporting substrate.

3. The ESD protective element according to claim 1, wherein said first semiconductor region of the second conduction type and said second semiconductor region of the second conduction type have no electrode connected.

4. The ESD protective element according to claim 1 further providing a first electrode connecting to said first semiconductor region of the first conduction type, a second electrode connecting to said second semiconductor region of the first conduction type, and an interlayer insulating film covering the upper part of said first semiconductor region of the second conduction type;

wherein said first electrode extends onto said first semiconductor region of the second conduction type toward said second semiconductor region of the first conduction type via said interlayer insulating film.

5. The ESD protective element according to claim 1 further providing a first electrode connecting to said first semiconductor region of the first conduction type, a second electrode connecting to said second semiconductor region of the first conduction type, a field insulating film covering the upper part of said first semiconductor region of the second conduction type, an interlayer insulating film formed on said field insulating film, and a conductive plate installed between said field insulating film and said interlayer insulating film and above said first semiconductor region of the second conduction type;

wherein said first electrode is electrically connected with said conductive plate.

6. The ESD protective element according to claim 1, wherein said first conduction type is the P type and said second conduction type the N type.

13. A semiconductor device comprising the ESD protective element according to claim 1 and a semiconductor circuit formed in said semiconductor layer and protected by said ESD protective element.

15. The semiconductor device according to claim 13, wherein said first semiconductor region of the first conduction type of said ESD protective element is electrically connected to the ground line of said semiconductor circuit, and said second semiconductor region of the first conduction type of said ESD protective element is electrically connected to the power supply line of said semiconductor circuit.

17. The semiconductor device according to claim 13, wherein said semiconductor circuit comprises multiple unit circuit cells, and the number of said ESD protective elements built in said semiconductor device is smaller than the number of said unit circuit cells.

19. A plasma display device having the ESD protective element according to claim 1.

21. A plasma display device having a semiconductor device according to claim 13.

7. An ESD protective element providing:

a semiconductor layer;

a first semiconductor region of a second conduction type formed in said semiconductor layer;

a first semiconductor region of a first conduction type formed in said first semiconductor region of the second conduction type;

a second semiconductor region of the second conduction type formed in said first semiconductor region of the second conduction type, away from said first semiconductor region of the first conduction type;

and a second semiconductor region of the first conduction type formed in said second semiconductor region of the second conduction type;

wherein the impurity concentration in said second semiconductor region of the second conduction type is higher than the impurity concentration in said first semiconductor region of the second conduction type, and said first semiconductor region of the second conduction type and said second semiconductor region of the second conduction type are set electrically floating.

8. The ESD protective element according to claim 7, wherein said semiconductor layer is formed on an insulating film installed on a supporting substrate.

9. The ESD protective element according to claim 7, wherein said first semiconductor region of the second conduction type and said second semiconductor region of the second conduction type have no electrode connected.

10. The ESD protective element according to claim 7 further providing a first electrode connecting to said first semiconductor region of the first conduction type, a second electrode connecting to said second semiconductor region of the first conduction type, and an interlayer insulating film covering the upper part of said first semiconductor region of the second conduction type;

wherein said first electrode extends onto said first semiconductor region of the second conduction type toward said second semiconductor region of the first conduction type via said interlayer insulating film.

11. The ESD protective element according to claim 7 further providing a first electrode connecting to said first semiconductor region of the first conduction type, a second electrode connecting to said second semiconductor region of the first conduction type, a field insulating film covering the upper part of said first semiconductor region of the second conduction type, an interlayer insulating film formed on said field insulating film, and a conductive plate installed between said field insulating film and said interlayer insulating film and above said first semiconductor region of the second conduction type;

wherein said first electrode is electrically connected with said conductive plate.

12. The ESD protective element according to claim 7, wherein said first conduction type is the P type and said second conduction type the N type.

14. A semiconductor device comprising the ESD protective element according to claim 7 and a semiconductor circuit formed in said semiconductor layer and protected by said ESD protective element.

16. The semiconductor device according to claim 14, wherein said first semiconductor region of the first conduction type of said ESD protective element is electrically connected to the ground line of said semiconductor circuit, and said second semiconductor region of the first conduction type of said ESD protective element is electrically connected to the power supply line of said semiconductor circuit.

18. The semiconductor device according to claim 14, wherein said semiconductor circuit comprises multiple unit circuit cells, and the number of said ESD protective elements built in said semiconductor device is smaller than the number of said unit circuit cells.

20. A plasma display device having the ESD protective element according to claim 7.

22. A plasma display device having a semiconductor device according to claim 14.