System and Method for Integrated Inductor

• US 20110169596A1
• Filed: 01/12/2010
• Published: 07/14/2011
• Est. Priority Date: 01/12/2010
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Pruegl, Klemens, Mackh, Gunther, Ahrens, Carsten
• Granted Patent: US 8,436,707 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 17/04 with magnetic core
• CPC Class Codes: H01F 2017/048 with encapsulating core, e.g. made of resin and magnetic powder
• CPC Class Codes: H01F 27/255 made from particles H01F27/26 takes precedence
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H01F 5/00 Coils superconducting coils H01F6/06; fixed inductances of the signal type H01F17/00
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48471 the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H05K 3/10 : in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
• CPC Class Codes: Y10T 29/49075 : including permanent magnet or core
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base

Abstract

In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seemless ferromagnetic material surrounding at least a first portion of the conductor.

Claims

1. An inductor comprising:

a substrate;

a conductor disposed above the substrate; and

a seemless ferromagnetic material surrounding at least a first portion of the conductor.

2. The inductor of claim 1, wherein at least a second portion of the conductor touches the substrate.

3. The inductor of claim 1, wherein the conductor comprises a loop.

4. The inductor of claim 1, further comprising a pad electrically coupled to the conductor.

5. The inductor of claim 1, wherein the substrate is disposed on a leadframe.

6. The inductor of claim 5, further comprising a bondwire coupled between a pad on the leadframe and a pad coupled to the conductor.

7. The inductor of claim 1, wherein the conductor has a cross-section comprising a first portion suspended above the substrate and a second portion suspended above the first portion.

8. The inductor of claim 1, wherein the substrate comprises a depressed portion beneath at least a second portion of the conductor, the depressed portion comprising a bottom surface a first distance below a top surface of the substrate.

9. The inductor of claim 1, further comprising a supporting layer disposed below at least a second portion of the conductor.

10. The inductor of claim 1, further comprising a circuit disposed on the substrate.

11. The inductor of claim 10, wherein the circuit is coupled to the conductor.

12. The inductor of claim 1, wherein the conductor comprises a plurality of windings.

13-29. -29. (canceled)

30. An inductor comprising:

a semiconductor substrate;

a conductor disposed within a trench in the semiconductor substrate; and

a seemless ferromagnetic material surrounding at least a first portion of the conductor.

31. The inductor of claim 30, wherein the trench comprises a deep trench.

32. The inductor of claim 30, wherein the semiconductor substrate surrounds a first gap extending from a top surface of the semiconductor substrate through a bottom surface of the semiconductor substrate, wherein the first gap is disposed adjacent to a first side of a first portion of the conductor.

33. The inductor of claim 32, wherein the first portion of the conductor forms a loop, and wherein the first gap is disposed within a center portion of the loop.

34. The inductor of claim 32, further comprising an edge of the semiconductor substrate disposed on a second side of the first portion of the conductor.

35. The inductor of claim 34, wherein the edge of the semiconductor substrate is formed by a scribe line.

36. The inductor of claim 32, wherein the seemless magnetic ferromagnetic fills the gap.

37. The inductor of claim 30, wherein the conductor disposed within the trench is a though silicon via (TSV).

38. The inductor of claim 34, wherein the conductor comprises copper.

39. The inductor of claim 30, further comprising an isolator layer disposed on the semiconductor substrate.

40. The inductor of claim 32, further comprising conductive pad coupled to conductor.

41. The inductor of claim 32, further comprising a lead frame coupled to the conductor.

42. An circuit component comprising:

a semiconductor substrate;

a conductor disposed within a trench in a semiconductor substrate, the conductor comprising a first portion forming at least one loop;

a gap disposed within the semiconductor substrate within the at least one loop, the gap spanning from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate; and

a seemless ferromagnetic material filling the gap and surrounding at least the first portion of the conductor.

43. The circuit component of claim 42, wherein a first portion of the conductor forming at least one loop comprises an inductor.

44. The circuit component of claim 42, further comprising an outer edge of the semiconductor substrate disposed immediately adjacent to the first portion of the conductor outside the at least one loop.

45. The circuit component of claim 44, wherein the outer edge of the semiconductor substrate is formed by a scribe line.

46. The circuit component of claim 44, wherein first portion of the conductor is formed by a though silicon via (TSV).