DYNAMIC LOW POWER MODE IMPLEMENTATION FOR COMPUTING DEVICES

• US 20110173474A1
• Filed: 12/10/2010
• Published: 07/14/2011
• Est. Priority Date: 01/11/2010
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Barrett, Christopher A., Salsbery, Brian J., Gargash, Norman S., Frantz, Andrew J.
• Granted Patent: US 9,235,251 B2
• Time in Patent Office: Days
• US Class Current: 713/323
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3243 Power saving in microcontroller unit
• CPC Class Codes: G06F 1/325 Power saving in peripheral device
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

The aspects enable a computing device or microprocessor to determine a low power mode that provides the most system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Aspects provide a mechanism for determining an optimal low power configuration made up of a set of low power modes for the various resources within the computing device by determining which low power modes are valid at the time the processor enters an idle state, ranking the valid low power modes by expected power savings given the current device conditions, determining which valid low power mode provides the greatest power savings while meeting the latency requirements, and selecting a particular low power mode for each resource to enter.

Claims

1. A method for conserving power in a computing device, comprising:

setting a flag bit associated with a resource when the resource is not in use, wherein the resource is one of a plurality of resources;

identifying the resources that may be placed in a low power mode based upon flag bit settings when a processor is able to enter an idle state;

registering a latency requirement for each of the identified resources;

selecting a most stringent latency requirement from the registered latency requirements;

evaluating on the computing device low power modes for each resource that may be placed in a low power mode to eliminate any low power resource mode, or any combination of low power resource modes, that have a combined latency requirement that exceeds the selected most stringent latency tolerance;

selecting a combination of low power resource modes that maximizes potential power savings and has a total latency requirement that is less than or equal to the selected worst case latency requirement; and

entering the selected combination of low power resource modes by executing an enter function of each of the selected low power modes on each of the identified resources.

2. The method of claim 1, wherein selecting a combination of low power resource modes comprises executing a knapsack problem solution algorithm for the various low power modes and resources.

3. The method of claim 1, further comprising:

determining a time that the processor is expected to remain in an idle state; and

determining the potential power savings of each evaluated low power resource modes based upon a potential power savings per unit time at a current temperature times the determined expected idle time.

4. The method of claim 1, further comprising:

measuring, when the device is in a known stable state, temperature and current, or temperature and power demand;

selecting a resource for measurement;

placing the selected resource in a low power resource mode;

measuring current or power demand while the selected resource is in the low power resource mode; and

repeating steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring current or power demand while the selected resource is in the low power resource mode until current or power demand during a low power resource mode has been measured for all resources having a low power resource mode,

wherein selecting a combination of low power resource modes that maximizes potential power savings comprises using the measured current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes.

5. The method of claim 4, further comprising:

repeating the operations recited in claim 3 at different temperatures; and

determining a temperature sensitivity of current or power demand associated with each low power resource mode,

wherein selecting a combination of low power resource modes that maximizes potential power savings comprises;

measuring a temperature of the computing device; and

using the determined temperature sensitivity of current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes at the measured computing device temperature.

6. The method of claim 1, wherein evaluating low power resources modes for each resource that may be placed in a low power mode comprises accomplishing a table look up process using the a low power mode selection data table using potential power saving, estimated idle time and operating conditions.

7. The method of claim 6, wherein the operating conditions include a temperature value.

8. The method of claim 6, further comprising:

gathering statistics regarding operating conditions on the computing device; and

updating the low power mode selection data table based upon the gathered operating conditions statistics.

9. The method of claim 8, wherein the operating conditions are selected from the group including temperature, power consumption of particular low power resource modes, idle times experienced in various operating states, and typical device usage patterns.

10. The method of claim 8, further comprising determining whether the computing device is connected to external power, wherein updating the low power mode selection data table based upon the operating conditions statistics is accomplish when the computing device is connected to external power.

35. The non-transitory storage medium of claim 34, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising:

repeating the operations recited in claim 3 at different temperatures; and

determining a temperature sensitivity of current or power demand associated with each low power resource mode,

wherein selecting a combination of low power resource modes that maximizes potential power savings comprises;

measuring a temperature of the computing device; and

using the determined temperature sensitivity of current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes at the measured computing device temperature.

11. A computing device having at least one processor, comprising:

means for setting a flag bit associated with a resource when the resource is not in use, wherein the resource is one of a plurality of resources;

means for identifying the resources that may be placed in a low power mode based upon flag bit settings when a processor is able to enter an idle state;

means for registering a latency requirement for each of the identified resources;

means for selecting a most stringent latency requirement from the registered latency requirements;

means for evaluating on the computing device low power modes for each resource that may be placed in a low power mode to eliminate any low power resource mode, or any combination of low power resource modes, that have a combined latency requirement that exceeds the selected most stringent latency tolerance;

means for selecting a combination of low power resource modes that maximizes potential power savings and has a total latency requirement that is less than or equal to the selected worst case latency requirement; and

means for entering the selected combination of low power resource modes by executing an enter function of each of the selected low power modes on each of the identified resources.

12. The computing device of claim 11, wherein means for selecting a combination of low power resource modes comprises means for executing a knapsack problem solution algorithm for the various low power modes and resources.

13. The computing device of claim 11, further comprising:

means for determining a time that the processor is expected to remain in an idle state; and

means for determining the potential power savings of each evaluated low power resource modes based upon a potential power savings per unit time at a current temperature times the determined expected idle time.

14. The computing device of claim 11, further comprising:

means for measuring, when the device is in a known stable state, temperature and current, or temperature and power demand;

means for selecting a resource for measurement;

means for placing the selected resource in a low power resource mode;

means for measuring current or power demand while the selected resource is in the low power resource mode; and

means for repeating steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring current or power demand while the selected resource is in the low power resource mode until current or power demand during a low power resource mode has been measured for all resources having a low power resource mode,

wherein means for selecting a combination of low power resource modes that maximizes potential power savings comprises means for using the measured current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes.

15. The computing device of claim 14, further comprising:

means for repeating the operations recited in claim 3 at different temperatures; and

means for determining a temperature sensitivity of current or power demand associated with each low power resource mode,

wherein means for selecting a combination of low power resource modes that maximizes potential power savings comprises;

means for measuring a temperature of the computing device; and

means for using the determined temperature sensitivity of current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes at the measured computing device temperature.

16. The computing device of claim 11, wherein means for evaluating low power resources modes for each resource that may be placed in a low power mode comprises means for accomplishing a table look up process using the a low power mode selection data table using potential power saving, estimated idle time and operating conditions.

17. The computing device of claim 16, wherein the operating conditions include a temperature value.

18. The computing device of claim 16, further comprising:

means for gathering statistics regarding operating conditions on the computing device; and

means for updating the low power mode selection data table based upon the gathered operating conditions statistics.

19. The computing device of claim 18, wherein the operating conditions are selected from the group including temperature, power consumption of particular low power resource modes, idle times experienced in various operating states, and typical device usage patterns.

20. The computing device of claim 18, further comprising means for determining whether the computing device is connected to external power, wherein means for updating the low power mode selection data table based upon the operating conditions statistics is accomplish when the computing device is connected to external power.

21. An apparatus for conserving power in a computing device, comprising:

a memory buffer; and

a processor coupled to the memory buffer, wherein the processor is configured with processor-executable instructions to perform operations comprising;

setting a flag bit associated with a resource when the resource is not in use, wherein the resource is one of a plurality of resources;

identifying the resources that may be placed in a low power mode based upon flag bit settings when a processor is able to enter an idle state;

registering a latency requirement for each of the identified resources;

selecting a most stringent latency requirement from the registered latency requirements;

evaluating on the computing device low power modes for each resource that may be placed in a low power mode to eliminate any low power resource mode, or any combination of low power resource modes, that have a combined latency requirement that exceeds the selected most stringent latency tolerance;

selecting a combination of low power resource modes that maximizes potential power savings and has a total latency requirement that is less than or equal to the selected worst case latency requirement; and

entering the selected combination of low power resource modes by executing an enter function of each of the selected low power modes on each of the identified resources.

22. The apparatus of claim 21, wherein the processor is further configured with processor-executable instructions such that selecting a combination of low power resource modes comprises executing a knapsack problem solution algorithm for the various low power modes and resources.

23. The apparatus of claim 21, wherein the processor is configured with processor-executable instructions to perform operations further comprising:

determining a time that the processor is expected to remain in an idle state; and

determining the potential power savings of each evaluated low power resource modes based upon a potential power savings per unit time at a current temperature times the determined expected idle time.

24. The apparatus of claim 21, wherein the processor is configured with processor-executable instructions to perform operations further comprising:

measuring, when the device is in a known stable state, temperature and current, or temperature and power demand;

selecting a resource for measurement;

placing the selected resource in a low power resource mode;

measuring current or power demand while the selected resource is in the low power resource mode; and

repeating steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring current or power demand while the selected resource is in the low power resource mode until current or power demand during a low power resource mode has been measured for all resources having a low power resource mode,

wherein selecting a combination of low power resource modes that maximizes potential power savings comprises using the measured current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes.

25. The apparatus of claim 24, wherein the processor is configured with processor-executable instructions to perform operations further comprising:

repeating the operations recited in claim 3 at different temperatures; and

determining a temperature sensitivity of current or power demand associated with each low power resource mode,

wherein selecting a combination of low power resource modes that maximizes potential power savings comprises;

measuring a temperature of the computing device; and

using the determined temperature sensitivity of current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes at the measured computing device temperature.

26. The apparatus of claim 21, wherein the processor is configured with processor-executable instructions such that evaluating low power resources modes for each resource that may be placed in a low power mode comprises accomplishing a table look up process using the a low power mode selection data table using potential power saving, estimated idle time and operating conditions.

27. The apparatus of claim 26, wherein the processor is configured with processor-executable instructions such that the operating conditions include a temperature value.

28. The apparatus of claim 26, wherein the processor is configured with processor-executable instructions to perform operations further comprising:

gathering statistics regarding operating conditions on the computing device; and

updating the low power mode selection data table based upon the gathered operating conditions statistics.

29. The apparatus of claim 28, wherein the processor is configured with processor-executable instructions such that the operating conditions are selected from the group including temperature, power consumption of particular low power resource modes, idle times experienced in various operating states, and typical device usage patterns.

30. The apparatus of claim 28, wherein the processor is configured with processor-executable instructions to perform operations further comprising:

determining whether the computing device is connected to external power, wherein updating the low power mode selection data table based upon the operating conditions statistics is accomplish when the computing device is connected to external power.

31. A non-transitory storage medium having stored thereon processor-executable software instructions configured to cause a processor to perform operations for conserving power in a computing device, the operations comprising:

setting a flag bit associated with a resource when the resource is not in use, wherein the resource is one of a plurality of resources;

identifying the resources that may be placed in a low power mode based upon flag bit settings when a processor is able to enter an idle state;

registering a latency requirement for each of the identified resources;

selecting a most stringent latency requirement from the registered latency requirements;

evaluating on the computing device low power modes for each resource that may be placed in a low power mode to eliminate any low power resource mode, or any combination of low power resource modes, that have a combined latency requirement that exceeds the selected most stringent latency tolerance;

selecting a combination of low power resource modes that maximizes potential power savings and has a total latency requirement that is less than or equal to the selected worst case latency requirement; and

entering the selected combination of low power resource modes by executing an enter function of each of the selected low power modes on each of the identified resources.

32. The non-transitory storage medium of claim 31, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations such that selecting a combination of low power resource modes comprises executing a knapsack problem solution algorithm for the various low power modes and resources.

33. The non-transitory storage medium of claim 31, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising:

determining a time that the processor is expected to remain in an idle state; and

determining the potential power savings of each evaluated low power resource modes based upon a potential power savings per unit time at a current temperature times the determined expected idle time.

34. The non-transitory storage medium of claim 31, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising:

measuring, when the device is in a known stable state, temperature and current, or temperature and power demand;

selecting a resource for measurement;

placing the selected resource in a low power resource mode;

measuring current or power demand while the selected resource is in the low power resource mode; and

repeating steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring current or power demand while the selected resource is in the low power resource mode until current or power demand during a low power resource mode has been measured for all resources having a low power resource mode,

wherein selecting a combination of low power resource modes that maximizes potential power savings comprises using the measured current or power demand associated with each low power resource mode to determine potential power savings of a combination of low power resource modes.

36. The non-transitory storage medium of claim 31, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations such that evaluating low power resources modes for each resource that may be placed in a low power mode comprises accomplishing a table look up process using the a low power mode selection data table using potential power saving, estimated idle time and operating conditions.

37. The non-transitory storage medium of claim 36, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations such that the operating conditions include a temperature value.

38. The non-transitory storage medium of claim 36, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising:

gathering statistics regarding operating conditions on the computing device; and

updating the low power mode selection data table based upon the gathered operating conditions statistics.

39. The non-transitory storage medium of claim 38, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations such that the operating conditions are selected from the group including temperature, power consumption of particular low power resource modes, idle times experienced in various operating states, and typical device usage patterns.

40. The non-transitory storage medium of claim 38, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising:

determining whether the computing device is connected to external power, wherein updating the low power mode selection data table based upon the operating conditions statistics is accomplish when the computing device is connected to external power.