SEMICONDUCTOR DEVICE
First Claim
1. A semiconductor device comprising:
- a plurality of source-bit lines extended in a first direction;
a plurality of first signal lines extended in the first direction;
a plurality of second signal lines extended in a second direction;
a plurality of word lines extended in the second direction;
a plurality of memory cells connected in parallel between the plurality of source-bit lines;
a first driver circuit electrically connected to the plurality of source-bit lines;
a second driver circuit electrically connected to the plurality of first signal lines;
a third driver circuit electrically connected to the plurality of second signal lines; and
a fourth driver circuit electrically connected to the plurality of word lines,wherein one of the plurality of memory cells comprises;
a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode;
a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and
a capacitor,wherein the second transistor includes an oxide semiconductor material,wherein the first gate electrode, one of the second source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another,wherein one of the plurality of source-bit lines and the first source electrode are electrically connected to each other,wherein another of the plurality of source-bit lines adjacent to the one of the plurality of source-bit lines and the first drain electrode are electrically connected to each other,wherein one of the plurality of first signal lines and the other of the second source and drain electrodes are electrically connected to each other,wherein one of the plurality of second signal lines and the second gate electrode are electrically connected to each other, andwherein one of the plurality of word lines and the other of the electrodes of the capacitor are electrically connected to each other.
1 Assignment
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Accused Products
Abstract
An object is to provide a semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of times of writing operations. A semiconductor device includes a source-bit line, a first signal line, a second signal line, a word line, and a memory cell connected between the source-bit lines. The memory cell includes a first transistor, a second transistor, and a capacitor. The second transistor is formed including an oxide semiconductor material. A gate electrode of the first transistor, one of a source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another. The source-bit line and a source electrode of the first transistor are electrically connected to each other. Another source-bit line adjacent to the above source-bit line and a drain electrode of the first transistor are electrically connected to each other.
53 Citations
24 Claims
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1. A semiconductor device comprising:
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a plurality of source-bit lines extended in a first direction; a plurality of first signal lines extended in the first direction; a plurality of second signal lines extended in a second direction; a plurality of word lines extended in the second direction; a plurality of memory cells connected in parallel between the plurality of source-bit lines; a first driver circuit electrically connected to the plurality of source-bit lines; a second driver circuit electrically connected to the plurality of first signal lines; a third driver circuit electrically connected to the plurality of second signal lines; and a fourth driver circuit electrically connected to the plurality of word lines, wherein one of the plurality of memory cells comprises; a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor, wherein the second transistor includes an oxide semiconductor material, wherein the first gate electrode, one of the second source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another, wherein one of the plurality of source-bit lines and the first source electrode are electrically connected to each other, wherein another of the plurality of source-bit lines adjacent to the one of the plurality of source-bit lines and the first drain electrode are electrically connected to each other, wherein one of the plurality of first signal lines and the other of the second source and drain electrodes are electrically connected to each other, wherein one of the plurality of second signal lines and the second gate electrode are electrically connected to each other, and wherein one of the plurality of word lines and the other of the electrodes of the capacitor are electrically connected to each other. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor device comprising:
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(n+1) (n is a natural number) source-bit lines extended in a first direction; n first signal lines extended in the first direction; m (m is a natural number) second signal lines extended in a second direction; m word lines extended in the second direction; (m×
n) memory cells connected in parallel between the source-bit lines;a first driver circuit electrically connected to the source-bit lines; a second driver circuit electrically connected to the first signal lines; a third driver circuit electrically connected to the second signal lines; and a fourth driver circuit electrically connected to the word lines, wherein one of the memory cells comprises; a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor, wherein the second transistor includes an oxide semiconductor material, wherein the first gate electrode, one of the second source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another, wherein one of the source-bit lines and the first source electrode are electrically connected to each other, wherein another of the source-bit lines adjacent to the one of source-bit lines and the first drain electrode are electrically connected to each other, wherein one of the first signal lines and the other of the second source and drain electrodes are electrically connected to each other, wherein one of the second signal lines and the second gate electrode are electrically connected to each other, wherein one of the word lines and the other of the electrodes of the capacitor are electrically connected to each other, and wherein the one of the source-bit lines is electrically connected to a first source electrode of a memory cell adjacent to the one of memory cells. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A semiconductor device comprising:
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a plurality of source-bit lines extended in a first direction; a plurality of first signal lines extended in a second direction; a plurality of second signal lines extended in the first direction; a plurality of word lines extended in the second direction; a plurality of memory cells connected in parallel between the plurality of source-bit lines; a first driver circuit electrically connected to the plurality of source-bit lines; a second driver circuit electrically connected to the plurality of first signal lines; a third driver circuit electrically connected to the plurality of second signal lines; and a fourth driver circuit electrically connected to the plurality of word lines, wherein one of the memory cells comprises; a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor, wherein the second transistor includes an oxide semiconductor material, wherein the first gate electrode, one of the second source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another, wherein one of the plurality of source-bit lines and the first source electrode are electrically connected to each other, wherein another of the plurality of source-bit lines adjacent to the one of the plurality of source-bit lines and the first drain electrode are electrically connected to each other, wherein one of the plurality of first signal lines and the other of the second source and drain electrodes are electrically connected to each other, wherein one of the plurality of second signal lines and the second gate electrode are electrically connected to each other, and wherein one of the plurality of word lines and the other of the electrodes of the capacitor are electrically connected to each other. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A semiconductor device comprising:
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(n+1) (n is a natural number) source-bit lines extended in a first direction; m (m is a natural number) first signal lines extended in a second direction; n second signal lines extended in the first direction; m word lines extended in the second direction; (m×
n) memory cells connected in parallel between the source-bit lines;a first driver circuit electrically connected to one of the source-bit lines; a second driver circuit electrically connected to one of the first signal lines; a third driver circuit electrically connected to one of the second signal lines; and a fourth driver circuit electrically connected to one of the word lines; wherein one of the memory cells comprises; a first transistor comprising a first gate electrode, a first source electrode, and a first drain electrode; a second transistor comprising a second gate electrode, a second source electrode, and a second drain electrode; and a capacitor, wherein the second transistor includes an oxide semiconductor material, wherein the first gate electrode, one of the second source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another, wherein one of the source-bit lines and the first source electrode are electrically connected to each other, wherein another of the source-bit lines adjacent to the one of source-bit lines and the first drain electrode are electrically connected to each other, wherein one of the first signal lines and the other of the second source and drain electrodes are electrically connected to each other, wherein one of the second signal lines and the second gate electrode are electrically connected to each other, wherein one of the word lines and the other of the electrodes of the capacitor are electrically connected to each other, and wherein the one of source-bit lines is electrically connected to a first source electrode of a memory cell adjacent to the one of memory cells. - View Dependent Claims (20, 21, 22, 23, 24)
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Specification