ELECTRONIC COMPONENT AND SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, CIRCUIT BOARD MOUNTED WITH THE SAME, AND ELECTRONIC APPLIANCE COMPRISING THE CIRCUIT BOARD

• US 20110180927A1
• Filed: 03/21/2011
• Published: 07/28/2011
• Est. Priority Date: 03/10/1997
• Status: Active Grant

• Current Assignee: Advanced Interconnect Systems Limited (Vector Capital Corporation)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: HASHIMOTO, Nobuaki
• Granted Patent: US 8,134,237 B2
• Time in Patent Office: Days
• US Class Current: 257/737
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/83101 as prepeg comprising a layer connector, e.g. provided in an insulating plate member
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 2225/06589 Thermal management, e.g. cooling
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 23/525 with adaptable interconnections
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19107 : off-chip wires

Abstract

An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such an integrated type semiconductor device comprises a first semiconductor device having a semiconductor chip with electrodes, a stress-relieving layer prepared on the semiconductor chip, a wire formed across the electrodes and the stress-relieving layer, and solder balls formed on the wire over the stress-relieving layer; and a bare chip as a second semiconductor device to be electrically connected to the first semiconductor device.

Claims

1. An integrated type semiconductor device comprising:

a first semiconductor device having a first semiconductor chip, first electrodes, a first resin layer, a first interconnecting line and an external electrode, the first resin layer provided on a first surface of the semiconductor chip, the first interconnecting line electrically connected to one of the first electrodes, the first interconnecting line having a connecting portion formed on the first resin layer, and the external electrode being a wire electrically connected to one of the first electrodes; and

a second semiconductor device having a second electrode and a bump, the second electrode provided on a first surface of the second semiconductor device, the bump electrically connected to the second electrode and connected to the connecting portion of the interconnecting line, the first surface of the second semiconductor device facing to the first surface of the first semiconductor chip.

2. The integrated type semiconductor device according to claim 1, wherein the second semiconductor device has

a second semiconductor chip having the second electrode, a second resin layer provided on the second semiconductor chip and a second interconnecting line formed extending from the second electrode to an area on the second resin layer, and the bump formed on the second interconnecting line on the second resin layer.

3. The integrated type semiconductor device according to claim 1, wherein the second semiconductor device has a second semiconductor chip having a second electrode, a second resin layer, a second inter connecting line, the second resin layer provided on the second semiconductor chip, the second interconnecting line formed underneath the second resin layer from the second electrode, a connecting portion of the second interconnecting line piercing through the second resin layer, the bump formed on the connecting portion of the second interconnecting line.

4. The integrated type semiconductor device according to claim 1, wherein the second semiconductor device has

a second interconnecting line formed from the second electrode and the bump formed on the second interconnecting line, and the bump of the second semiconductor device is electrically connected to the first semiconductor device.

5. The integrated type semiconductor device according to claim 1, further comprising:

at least one third semiconductor device electrically connected to the first semiconductor device.

6. The integrated type semiconductor device according to claim 1, further comprising:

a plastic package to seal both the first and second semiconductor devices; and

an outer lead connected to the external electrode of the first semiconductor device.

7. The integrated type semiconductor device according to claim 1, wherein the first semiconductor device is equipped with a radiator attached to a second surface of the first semiconductor chip opposite to the first surface of the first semiconductor chip.

8. A circuit board on which the integrated type semiconductor device according to claim 1 is mounted.

9. An electronic appliance comprising the circuit board according to claim 9.

10. An integrated type electronic component comprising:

a semiconductor device having a first semiconductor chip, first electrodes, a first resin layer and an interconnecting line, the first resin layer provided on a first surface of the first semiconductor chip, the interconnecting line electrically connected to one of the first electrodes, the interconnecting line having a connecting portion formed on the first resin layer;

an external electrode being apart from the semiconductor device;

a wire electrically connecting one of the first electrodes and the external electrode; and

an electronic component having a second electrode and a bump, the second electrode provided on a first surface of the electronic component, the bump electrically connected to the second electrode and connected to the connecting portion of the interconnecting line, the first surface of the electronic component facing to the first surface of the first semiconductor chip.

11. An integrated type electronic component comprising:

a first electronic component having first electrodes, a first resin layer, an interconnecting line, the first resin layer provided on a first surface of the first electronic component, the interconnecting line electrically connected to one of the first electrodes, the interconnecting line having a connecting portion formed on the first resin layer;

an external electrode being apart from the first electronic component;

a wire electrically connecting one of the first electrodes and the external electrode; and

a second electronic component having a second electrode and a bump, the second electrode provided on a first surface of the second electronic component, the bump electrically connected to the second electrode and connected to the connecting portion of the interconnecting line, the first surface of the second electronic component facing to the first surface of the first electronic component.