ARC FAULT DETECTOR WITH CIRCUIT INTERRUPTER

• US 20110181296A1
• Filed: 04/05/2011
• Published: 07/28/2011
• Est. Priority Date: 10/03/2002
• Status: Active Grant

• Current Assignee: Leviton Manufacturing Company Incorporated
• Original Assignee: Leviton Manufacturing Company Incorporated
• Inventors: Bradley, Roger M., Kolker, David, Mernyk, Ross
• Granted Patent: US 8,564,307 B2
• Time in Patent Office: Days
• US Class Current: 324/551
• CPC Class Codes: G01R 31/1272 of cable, line or wire insulation, e.g. using partial discharge measurements locating faults in cables G01R31/083
• CPC Class Codes: G01R 31/52 Testing for short-circuits, leakage current or ground faults
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 3/162 for ac systems
• CPC Class Codes: H02H 3/334 with means to produce an artificial unbalance for other protection or monitoring reasons or remote control H02H3/338 takes precedence
• CPC Class Codes: H02H 3/44 responsive to the rate of change of electrical quantities

Abstract

There is here disclosed a method and apparatus for detecting the occurrence of arcing of a conductor by monitoring the current on an AC power line. The signal detected is split and directed along four separate paths to generate four signals having separate characteristics which represent the current in the line. A first path is for a signal representative of the current flowing in the line. A second path is for a signal having a pulse for each occurrence of a positive step change in current that is significant and has a di/dt value above a predetermined value. A third path is for a signal having a pulse for each occurrence of a negative step change in current that is significant and has a di/dt value above a predetermined value. A fourth path is for a signal having a voltage level representative of the broadband noise signal on the line. Using at least one of five different methods in combination with one of three input signals, a reference signal designated as “SINE” is generated. The SINE signal generated in combination with a CURRENT input is used to produce a control waveform “DELTA”. DELTA can be represented as a relative value or as an absolute difference between the SINE and the CURRENT. Each occurring half cycle of the DELTA signal is analyzed by, for example, a micro-controller for specific identifiable characteristics found to indicate the presence of arcing. Upon the detection of arcing, an output signal can be generated to activate a circuit interrupting mechanism, sound an audio alarm and/or alert a central monitoring station.

Claims

1. An arc fault detecting device comprising:

at least one transformer adapted to generate a voltage based on a current present on a line conductor of an electrical wiring unit;

a comparator configured to generate at least one signal based on the voltage generated by the at least one transformer;

a first path configured to modify the at least one signal to represent the current present on the line conductor;

a second path configured to modify the at least one signal to represent a pulse for each occurrence of a positive step change in the current as a function of time;

a third path configured to modify the at least one signal to represent a pulse for each occurrence of a negative step change in the current as a function of time;

a fourth path configured to modify the at least one signal to represent a voltage level indicating a broadband noise signal on the current present on the line conductor; and

a controller in electrical communication with the comparator by the at least one of a first, second, third, and fourth path and configured to compare the at least one modified signal to a first waveform generated by the controller, the comparison between the at least one modified signal and the first waveform representing an absolute difference therebetween;

wherein the absolute difference is analyzed by the controller, continuously and a half cycle at a time, by using at least one of a plurality of criteria.

2. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing based on a condition selected from the following:

if there are two peaks in the absolute difference within the half cycle;

if the second peak of the two peaks of the absolute difference in the half cycle is lower than the first peak; and

if half cycles having the two peaks within the absolute difference are surrounded by a period of one or more half cycles when a lower current flows.

3. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing if two step changes of current occur in the half cycle where the first has a current function of time spike of a same polarity as the current and the second has a current function of time spike of opposite polarity to the current.

4. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing by randomness in a time between current function of time spikes.

5. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing by half cycles having two current function of time spikes surrounding a period of one or more half cycles when a much lower arcing current is flowing.

6. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing when a high frequency noise (HFN) input signal is high between two current function of time spikes and is low during a remaining half cycle.

7. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing if a HFN input peaks between two current function of time events.

8. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing if a HFN follows a sine curve between two current function of time events.

9. The arc fault detecting device according to claim 1, wherein one criterion of the plurality of criteria relates to indicating arcing by half cycles having HFN signal characteristics surrounding a period of one or more half cycles when a much lower HFN signal is present.

10. The arc fault detecting device according to claim 1, wherein upon determination of an arc fault, the controller drives at least one output pin high.

11. A method of detecting an arc fault, the method comprising:

generating a voltage based on a current present on a line conductor of an electrical wiring unit, via at least one transformer;

generating at least one signal based on the voltage generated by the at least one transformer, via a comparator;

modifying the at least one signal to represent the current present on the line conductor, via a first path;

modifying the at least one signal to represent a pulse for each occurrence of a positive step change in the current as a function of time, via a second path;

modifying the at least one signal to represent a pulse for each occurrence of a negative step change in the current as a function of time, via a third path;

modifying the at least one signal to represent a voltage level indicating a broadband noise signal on the current present on the line conductor, via a fourth path;

allowing electrical communication between the controller and the comparator by the at least one of a first, second, third, and fourth path;

comparing the at least one modified signal to a first waveform generated by the controller, the comparison between the at least one modified signal and the first waveform representing an absolute difference therebetween; and

analyzing the absolute difference via the controller, continuously and a half cycle at a time, by using at least one of a plurality of criteria.

12. The method according to claim 11, further comprising indicating arcing based on a condition selected from whether:

there are two peaks in the absolute difference within the half cycle;

the second peak of the two peaks of the absolute difference in the half cycle is lower than the first peak; and

half cycles having the two peaks within the absolute difference are surrounded by a period of one or more half cycles when a lower current flows.

13. The method according to claim 11, further comprising indicating arcing if two step changes of current occur in the half cycle where the first has a current function of time spike of a same polarity as the current and the second has a current function of time spike of opposite polarity to the current.

14. The method according to claim 11, further comprising indicating arcing by randomness in a time between current function of time spikes.

15. The method according to claim 11, further comprising indicating arcing by half cycles having two current function of time spikes surrounding a period of one or more half cycles when a much lower arcing current is flowing.

16. The method according to claim 11, further comprising indicating arcing based on a condition selected from whether:

a high frequency noise (HFN) input signal is high between two current function of time spikes and is low during a remaining half cycle;

a HFN input peaks between two current function of time events;

a HFN follows a sine curve between two current function of time events; and

half cycles having HFN signal characteristics surrounding a period of one or more half cycles when a much lower HFN signal is present.

17. An arc fault detector circuit comprising:

a differential transformer with a voltage detector configured to detect a signal representative of a current;

a current transformer in electrical communication with a voltage follower configured to split the signal into four signals representative of the current; and

a controller in electrical communication with the differential transformer and the current transformer, the controller configured to receive the four signals for sampling.

18. The arc fault detector circuit according to claim 17, wherein:

a first path is configured to modify the signal to represent the current;

a second path is configured to modify the signal to represent a pulse for each occurrence of a positive step change in the current as a function of time;

a third path is configured to modify the signal to represent a pulse for each occurrence of a negative step change in the current as a function of time; and

a fourth path is configured to modify the signal to represent a voltage level indicating a broadband noise signal on the current.

19. The arc fault detector circuit according to claim 18, wherein the first path includes a programmable gain amplifier and a low pass filter for modifying the signal to represent the current.

20. The arc fault detector circuit according to claim 18, wherein the second and third paths include a differentiator, a comparator, and a peak detector for modifying the signal to represent the pulse.

21. The arc fault detector circuit according to claim 18, wherein the fourth path includes a bandpass filter and an integrator.