Multi-Level Controller System

• US 20110184537A1
• Filed: 04/05/2011
• Published: 07/28/2011
• Est. Priority Date: 11/18/2002
• Status: Abandoned Application

• Current Assignee: IRIS International Inc. (Danaher Corporation)
• Original Assignee: International Remote Imaging Systems Inc (Danaher Corporation)
• Inventors: Kasdan, Harvey, Fridge, David Alan, Tindel, Jon Frank, Gold, Kenneth S., Atterholt, Ken A.
• Application Number:
  US13/080,618
• Publication Number:
  US 20110184537A1
• Time in Patent Office: Days
• US Class Current: 700/83
• CPC Class Codes: G01N 15/1433 using image recognition
• CPC Class Codes: G01N 15/1456 without spatial resolution of the texture or inner structure of the particle, e.g. processing of pulse signals
• CPC Class Codes: G01N 15/1459 the analysis being performed on a sample stream
• CPC Class Codes: G01N 35/00871 Communications between instruments or with remote terminals
• CPC Class Codes: G01N 35/1009 Characterised by arrangements for controlling the aspiration or dispense of liquids
• CPC Class Codes: G05B 19/0421 Multiprocessor system
• CPC Class Codes: G05B 19/045 using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers
• CPC Class Codes: G05B 2219/2207 Microcontroller combined with state sequencer
• CPC Class Codes: G05B 2219/2231 Master slave
• CPC Class Codes: G05B 2219/2233 Each slave can control several other slaves
• CPC Class Codes: G05B 2219/23256 Hybrid programming, part sequence, part continuous
• CPC Class Codes: G05B 2219/23289 State logic control, finite state, tasks, machine, fsm
• CPC Class Codes: G05B 2219/23428 Select program from look up tables as function of detector states, pointer, index to program
• CPC Class Codes: G05B 2219/25484 Synchronize microprocessor and connected, controlled state machine
• CPC Class Codes: G05B 2219/2657 Blood, urine analyzer

Abstract

The invention is a state machine having a host controller that controls a level-1 controller, wherein the level-1 controller controls the level-2 controller. The level-2 controller controls system component controllers, which in turn control system components to execute a process segment. For example, the machine includes a host controller that selects a set of states to be executed, a level-1 controller that activates the set of states in a predetermined order, wherein each state includes commands, and a level-2 controller that controls system components according to the commands. A method of executing a process includes identifying a set of states to be executed, issuing state commands that need to be issued to execute the current state in the set of states, and activating a next state only after all expected status reports have been received for the current state.

Claims

1. A system comprising:

a controller;

at least one system component; and

a processor for controlling the controller according to a table, the table comprising;

a first column containing instructions in a first language that is not readable by the controller; and

a second column containing corresponding instructions in a second language that is readable by the controller for controlling the system components, wherein the corresponding instructions in the second column are translated versions of the instructions in the first column;

wherein the controller controls the at least one system component according to the instructions in the second column.

2. The system of claim 1, further comprising:

a user interface configured to input the instructions in the first column.

3. The system of claim 1, wherein the processor is configured to translate the instructions in the first column to the corresponding instructions in the second column.

4. The system of claim 1, further comprising:

a user interface configured to modify at least one of the instructions in the first column, wherein the processor is configured to translate the modified at least one of the instructions to the second language for replacing the corresponding instructions in the second column.

5. The system of claim 1, wherein the table further comprises:

a third column of status reports to send to the processor or a higher level controller;

a fourth column of tests for checking whether a predefined condition is fulfilled; and

a fifth column defining a course of action if the predefined condition is fulfilled.