SEMICONDUCTOR DEVICE, DISPLAY DEVICE AND ELECTRONIC APPARATUS
First Claim
Patent Images
1. A semiconductor device comprising:
- a pixel, the pixel comprising;
a first transistor, wherein a first gate of the first transistor is electrically connected to a first line;
a second transistor, wherein one of a second source and a second drain of the second transistor is electrically connected to one of a first source and a first drain of the first transistor, and a second gate of the second transistor is electrically connected to a second line;
a third transistor, wherein a third gate of the third transistor is electrically connected to the other one of the second source and the second drain, and one of a third source and a third drain is electrically connected to a third line; and
a light emitting element electrically connected to the other one of the third source and the third drain,wherein at least one of the first transistor, the second transistor and the third transistor comprises;
a semiconductor film;
a gate insulating film adjacent to the semiconductor film; and
a gate electrode adjacent to the semiconductor film with the gate insulating film interposed therebetween, andwherein the semiconductor film comprises an oxide semiconductor comprising indium.
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Abstract
A semiconductor device of the invention includes a data line, a power source line, a first scan line, a second scan line, a first transistor, a second transistor, a memory circuit, a third transistor, and a light-emitting element. A gate of the first transistor is connected to the data line, and a first terminal thereof is connected to the power source line; a gate of the second transistor is connected to the first scan line, and a first terminal thereof is connected to a second terminal of the first transistor; the memory circuit is connected to a second terminal of the second transistor and the second scan line; a first terminal of the third transistor is connected to the light-emitting element; and the memory circuit holds a first potential inputted from the power source line or a second potential inputted from the second scan line, and applies the potential to a gate of the third transistor to control emission/non-emission of the light-emitting element.
121 Citations
30 Claims
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1. A semiconductor device comprising:
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a pixel, the pixel comprising; a first transistor, wherein a first gate of the first transistor is electrically connected to a first line; a second transistor, wherein one of a second source and a second drain of the second transistor is electrically connected to one of a first source and a first drain of the first transistor, and a second gate of the second transistor is electrically connected to a second line; a third transistor, wherein a third gate of the third transistor is electrically connected to the other one of the second source and the second drain, and one of a third source and a third drain is electrically connected to a third line; and a light emitting element electrically connected to the other one of the third source and the third drain, wherein at least one of the first transistor, the second transistor and the third transistor comprises; a semiconductor film; a gate insulating film adjacent to the semiconductor film; and a gate electrode adjacent to the semiconductor film with the gate insulating film interposed therebetween, and wherein the semiconductor film comprises an oxide semiconductor comprising indium. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor device comprising:
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a first pixel and a second pixel, wherein each of the first pixel and the second pixel comprises a first transistor, wherein a first gate of the first transistor is electrically connected to a first line; a second transistor, wherein one of a second source and a second drain of the second transistor is electrically connected to one of a first source and a first drain of the first transistor, and a second gate of the second transistor is electrically connected to a second line; a third transistor, wherein a third gate of the third transistor is electrically connected to the other one of the second source and the second drain, and one of a third source and a third drain is electrically connected to a third line; and a light emitting element electrically connected to the other one of the third source and the third drain, wherein at least one of the first transistor, the second transistor and the third transistor comprises; a semiconductor film; a gate insulating film adjacent to the semiconductor film; and a gate electrode adjacent to the semiconductor film with the gate insulating film interposed therebetween, and wherein the semiconductor film comprises an oxide semiconductor comprising indium. wherein the other one of the first source and the first drain of the first pixel and the other one of the first source and the first drain of the second pixel are electrically connected a fourth line. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A semiconductor device comprising:
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a plastic substrate; and a pixel over the plastic substrate, the pixel comprising; a first transistor, wherein a first gate of the first transistor is electrically connected to a first line; a second transistor, wherein one of a second source and a second drain of the second transistor is electrically connected to one of a first source and a first drain of the first transistor, and a second gate of the second transistor is electrically connected to a second line; a third transistor, wherein a third gate of the third transistor is electrically connected to the other one of the second source and the second drain, and one of a third source and a third drain is electrically connected to a third line; and a light emitting element electrically connected to the other one of the third source and the third drain, wherein at least one of the first transistor, the second transistor and the third transistor comprises; a semiconductor film; a gate insulating film adjacent to the semiconductor film; and a gate electrode adjacent to the semiconductor film with the gate insulating film interposed therebetween, and wherein the semiconductor film comprises an oxide semiconductor comprising indium. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsOsame, Mitsuaki, Anzai, Aya
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Granted Patent
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Time in Patent OfficeDays
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Field of Search
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US Class Current345/690
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CPC Class CodesG09G 2300/0857 Static memory circuit, e.g....G09G 2310/0251 Precharge or discharge of p...G09G 2320/0223 Compensation for problems r...G09G 2330/023 using energy recovery or co...G09G 3/2022 using sub-framesG09G 3/3258 with pixel circuitry contro...
