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SHARED BIT LINE AND SOURCE LINE RESISTIVE SENSE MEMORY STRUCTURE

  • US 20110188301A1
  • Filed: 04/14/2011
  • Published: 08/04/2011
  • Est. Priority Date: 07/13/2009
  • Status: Active Grant
First Claim
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1. A spin transfer torque memory apparatus comprising:

  • a first transistor having a first contact electrically connected to a first source line and a second contact electrically connected to a first spin transfer torque memory element;

    a second transistor having a first contact electrically connected to a second source line and a second contact electrically connected to a second spin transfer torque memory element; and

    a bit line electrically connected to the first spin transfer torque memory element and the second spin transfer torque memory element.

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