METHOD FOR MEMORY CELL ERASURE WITH A PROGRAMMING MONITOR OF REFERENCE CELLS
First Claim
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1. A memory device comprising:
- an array of memory cells including a number of data cells and a number of reference cells; and
control circuitry coupled to the array of memory cells and configured to;
as a part of an erase operation performed on a selected group of memory cells, perform a programming monitor operation on the number of reference cells prior to performing a programming operation on at least some of the number of data cells; and
at least partially based on the programming monitor operation, adjusting voltages associated with operating the at least some of the number of data cells.
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Abstract
Embodiments of the present disclosure provide methods, devices, modules, and systems for operating memory cells. One method includes: performing an erase operation on a selected group of memory cells, the selected group including a number of reference cells and a number of data cells; performing a programming monitor operation on the number of reference cells as part of the erase operation; and determining a number of particular operating parameters associated with operating the number of data cells at least partially based on the programming monitor operation performed on the number of reference cells.
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Citations
22 Claims
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1. A memory device comprising:
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an array of memory cells including a number of data cells and a number of reference cells; and control circuitry coupled to the array of memory cells and configured to; as a part of an erase operation performed on a selected group of memory cells, perform a programming monitor operation on the number of reference cells prior to performing a programming operation on at least some of the number of data cells; and at least partially based on the programming monitor operation, adjusting voltages associated with operating the at least some of the number of data cells. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A memory device, comprising:
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an array of memory cells including data cells and reference cells; and control circuitry coupled to the array of memory cells and configured to; as a part of an erase operation, apply a programming voltage pulse having a particular magnitude to a control gate of each of a number of reference cells; determine an amount of the number of reference cells whose threshold voltage reaches a particular level in response to the applied programming voltage pulse; select an adjusted set of particular operating voltages based, at least partially, on the determined amount of the number of reference cells whose threshold voltage reaches the particular level in response to the applied programming voltage pulse; and program a number of data cells using at least one adjusted programming voltage from the adjusted set of particular operating voltages. - View Dependent Claims (8, 9, 10, 11)
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12. A memory device, comprising:
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an array of memory cells including data cells and reference cells; and control circuitry coupled to the array and configured to; perform an erase operation on a selected group of memory cells, the selected group including a number of reference cells and a number of data cells, wherein the number of data cells are associated with a number of particular operating parameters; as a part of the erase operation and prior to programming the number of data cells, apply a voltage pulse having a particular magnitude to the number of reference cells; determine an amount of the number of reference cells whose threshold voltage reaches a particular level in response to the applied voltage pulse; and adjust at least one of the number of particular operating parameters associated with the number of data cells based on the determined amount of the number of reference cells. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A memory device, comprising:
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an array of memory cells including data cells and reference cells; and control circuitry coupled to the array and configured to; selecting a first block of a number of blocks of memory cells having a number of data cells and a number of reference cells, each of the number of blocks having an associated set of particular operating parameters used to program the number of data cells; perform an erase operation on the number of data cells and the number of reference cells of the selected first block; as a part of the erase operation, perform a programming monitor operation on the number of reference cells of the selected first block before programming the number of data cells of the selected first block; and adjust at least one of the associated set of particular operating parameters used to program the number of data cells of the selected first block based, at least partially, on the programming monitor operation performed on the number of reference cells of the selected first block. - View Dependent Claims (19, 20, 21, 22)
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Specification