THIN FILM TRANSISTOR PANEL AND FABRICATING METHOD THEREOF
First Claim
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1. A method for forming a panel comprising a thin film transistor, the method comprising:
- forming an oxide semiconductor pattern comprising a channel region;
forming an etch stopper at a position corresponding to the channel region; and
forming a first electrode and a second electrode spaced apart from the first electrode, the channel region configured to connect the first electrode to the second electrode,wherein the oxide semiconductor pattern, the first electrode, and the second electrode are formed using a first mask.
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Abstract
A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
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Citations
50 Claims
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1. A method for forming a panel comprising a thin film transistor, the method comprising:
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forming an oxide semiconductor pattern comprising a channel region; forming an etch stopper at a position corresponding to the channel region; and forming a first electrode and a second electrode spaced apart from the first electrode, the channel region configured to connect the first electrode to the second electrode, wherein the oxide semiconductor pattern, the first electrode, and the second electrode are formed using a first mask. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A panel comprising a thin film transistor, the panel comprising:
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a substrate; a first electrode on the substrate; a first insulating layer on the first electrode; an oxide semiconductor pattern on the first insulating layer, the oxide semiconductor pattern comprising a channel region; an etch stopper on the oxide semiconductor pattern; and a conductive layer on the substrate, the conductive layer comprising a signal line, a second electrode, and a third electrode, wherein the second electrode and the third electrode are disposed on the etch stopper and the oxide semiconductor pattern, and wherein except for the channel region of the oxide semiconductor pattern, sidewalls of the oxide semiconductor pattern substantially coincide with sidewalls of the signal line, the second electrode, and the third electrode. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for forming a panel comprising a thin film transistor, the method comprising:
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forming an oxide semiconductor pattern comprising a channel region; forming an etch stopper at a position corresponding to the channel region; and forming a first electrode and a second electrode spaced apart from the first electrode, the channel region configured to connect the first electrode to the second electrode, wherein the etch stopper and the oxide semiconductor pattern are formed using a first mask. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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36. A panel comprising a thin film transistor, the panel comprising:
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a substrate; a first electrode on the substrate; a first insulating layer on the first electrode; an oxide semiconductor pattern on the first insulating layer; an etch stopper on the oxide semiconductor pattern; a second electrode and a third electrode on the etch stopper and the oxide semiconductor pattern, wherein the first insulating layer comprises a first region disposed under the etch stopper and a second region disposed outside the first region, and a thickness of the first region differs from a thickness of the second region. - View Dependent Claims (37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47)
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48. A panel comprising a thin film transistor, the panel comprising:
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a substrate; a first electrode on the substrate; a first insulating layer on the first electrode; an oxide semiconductor pattern on the first insulating layer; an etch stopper on the oxide semiconductor pattern; a second electrode and a third electrode on the etch stopper and the oxide semiconductor pattern, wherein a pattern of the etch stopper is contained entirely within a perimeter of the oxide semiconductor pattern, and distances between corresponding sidewalls of the etch stopper and the oxide semiconductor pattern are substantially the same. - View Dependent Claims (49, 50)
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Specification