SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20110193077A1
• Filed: 01/26/2011
• Published: 08/11/2011
• Est. Priority Date: 02/05/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei
• Granted Patent: US 8,274,079 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.

Claims

1. A semiconductor device comprising:

a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a flexible substrate;

an insulating layer over the bottom-gate transistor; and

a conductive layer over the insulating layer,

wherein the insulating layer is provided so as to cover the oxide semiconductor layer and be in contact with the gate insulating layer, and

wherein in a direction of a channel width of the oxide semiconductor layer, the conductive layer is provided so as to cover a channel formation region of the oxide semiconductor layer and the end portion of the insulating layer and be in contact with the gate electrode layer.

2. The semiconductor device according to claim 1, wherein a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer between the oxide semiconductor layer and the insulating layer.

3. The semiconductor device according to claim 1, wherein a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer between the oxide semiconductor layer and the gate insulating layer.

4. The semiconductor device according to claim 1, wherein a length of a region where the gate electrode layer and the conductive layer are in contact with each other in a direction of a channel length of the oxide semiconductor layer is longer than the channel length of the oxide semiconductor layer.

5. A semiconductor device comprising:

a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a flexible substrate;

an insulating layer over the bottom-gate transistor; and

a conductive layer over the insulating layer,

wherein the insulating layer is provided so as to cover the oxide semiconductor layer and be in contact with the gate insulating layer, and

wherein in a direction of a channel width of the oxide semiconductor layer, an end portion of the gate insulating layer and an end portion of the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer is provided so as to cover a channel formation region of the oxide semiconductor layer, the end portion of the gate insulating layer, and the end portion of the insulating layer and be in contact with the gate electrode layer.

6. The semiconductor device according to claim 5, wherein a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer between the oxide semiconductor layer and the insulating layer.

7. The semiconductor device according to claim 5, wherein a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer between the oxide semiconductor layer and the gate insulating layer.

8. The semiconductor device according to claim 5, wherein a length of a region where the gate electrode layer and the conductive layer are in contact with each other in a direction of a channel length of the oxide semiconductor layer is longer than the channel length of the oxide semiconductor layer.

9. A semiconductor device comprising:

a driver circuit portion including a bottom-gate transistor for a driver circuit and a pixel portion including a transistor for a pixel over one flexible substrate,

wherein the bottom-gate transistor for a driver circuit includes a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer,

wherein an insulating layer is provided over the oxide semiconductor layer,

wherein a conductive layer is provided over the insulating layer,

wherein the insulating layer is provided so as to cover the oxide semiconductor layer and be in contact with the gate insulating layer, and

wherein in a direction of a channel width of the oxide semiconductor layer, an end portion of the gate insulating layer and an end portion of the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer is provided so as to cover a channel formation region of the oxide semiconductor layer, the end portion of the gate insulating layer, and the end portion of the insulating layer and be in contact with the gate electrode layer.

10. The semiconductor device according to claim 9, wherein a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer between the oxide semiconductor layer and the insulating layer.

11. The semiconductor device according to claim 9, wherein a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor layer between the oxide semiconductor layer and the gate insulating layer.

12. The semiconductor device according to claim 9, wherein a length of a region where the gate electrode layer and the conductive layer are in contact with each other in a direction of a channel length of the oxide semiconductor layer is longer than the channel length of the oxide semiconductor layer.

13. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a flexible substrate;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

forming an insulating layer so as to cover the oxide semiconductor layer;

forming an opening in the gate insulating layer and the insulating layer so as to expose the gate electrode layer; and

forming a conductive layer so as to cover a top portion of a stack including the gate insulating layer and the insulating layer, and cover an end portion of the stack including the gate insulating layer and the insulating layer and be in contact with the gate electrode layer at the opening.

14. The method for manufacturing a semiconductor device, according to claim 13, wherein the oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation.

15. A method for manufacturing a semiconductor device, comprising the steps of:

forming a separation layer over a manufacturing substrate;

forming a gate electrode layer over the separation layer;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer;

forming an insulating layer so as to cover the oxide semiconductor layer;

forming an opening in the gate insulating layer and the insulating layer so as to expose the gate electrode layer;

forming a conductive layer so as to cover a top portion of a stack including the gate insulating layer and the insulating layer, and cover an end portion of the stack including the gate insulating layer and the insulating layer and be in contact with the gate electrode layer at the opening to form a transistor;

transferring the transistor from the manufacturing substrate to a supporting substrate by using the separation layer; and

transferring the transistor that is transferred to the supporting substrate to a flexible substrate.

16. The method for manufacturing a semiconductor device, according to claim 15, wherein the oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation.