SEMICONDUCTOR DEVICE

• US 20110194332A1
• Filed: 02/02/2011
• Published: 08/11/2011
• Est. Priority Date: 02/05/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Saito, Toshihiko
• Granted Patent: US 8,385,105 B2
• Time in Patent Office: Days
• US Class Current: 365/149
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: G11C 16/02 electrically programmable
• CPC Class Codes: H01L 29/94 Metal-insulator-semiconductors, e.g. MOS

Abstract

An object is to provide a semiconductor device capable of accurate data retention even with a memory element including a depletion mode transistor. A gate terminal of a transistor for controlling input of a signal to a signal holding portion is negatively charged in advance. The connection to a power supply is physically broken, whereby negative charge is held at the gate terminal. Further, a capacitor having terminals one of which is electrically connected to the gate terminal of the transistor is provided, and thus switching operation of the transistor is controlled with the capacitor.

Claims

1. A semiconductor device comprising:

a word line;

a bit line;

a memory element comprising;

a transistor; and

a signal holding portion,

wherein a gate terminal of the transistor is electrically connected to the word line,

wherein one of a source terminal and a drain terminal of the transistor is electrically connected to the bit line, and

wherein the other of the source terminal and the drain terminal of the transistor is electrically connected to the signal holding portion;

a capacitor being capable of holding a potential of the gate terminal of the transistor, wherein a first terminal of the capacitor is electrically connected to the word line;

a word line driver circuit configured to control a potential of a second terminal of the capacitor; and

a bit line driver circuit configured to control a potential of the bit line.

2. The semiconductor device according to claim 1, further comprising a switch,

wherein a first terminal of the switch is electrically connected to the word line and a second terminal of the switch is electrically connected to a power supply circuit.

3. The semiconductor device according to claim 2,

wherein the switch is a second transistor.

4. The semiconductor device according to claim 1,

wherein the signal holding portion comprises a second transistor and a second capacitor.

5. The semiconductor device according to claim 1,

wherein the word line is negatively charged.

6. The semiconductor device according to claim 1, wherein the transistor comprises an oxide semiconductor.

7. An electronic device comprising the semiconductor device according to claim 1, wherein the electronic device is selected from the group consisting of a liquid crystal display device, an EL display device, a television receiver, and a cellular phone.

8. A semiconductor device comprising:

a word line;

a bit line;

a memory element comprising;

a first transistor; and

a signal holding portion,

wherein a gate terminal of the first transistor is electrically connected to the word line,

wherein one of a source terminal and a drain terminal of the first transistor is electrically connected to the bit line, and

wherein the other of the source terminal and the drain terminal of the first transistor is electrically connected to the signal holding portion;

a capacitor being capable of holding a potential of the gate terminal of the first transistor, wherein a first terminal of the capacitor is electrically connected to the word line;

a word line driver circuit configured to control a potential of a second terminal of the capacitor;

a bit line driver circuit configured to control a potential of the bit line; and

a second transistor, wherein one of a source terminal and a drain terminal of the second transistor is electrically connected to the word line.

9. The semiconductor device according to claim 8, further comprising:

a first power supply circuit;

a second power supply circuit;

a first switch,

wherein a first terminal of the first switch is electrically connected to a gate terminal of the second transistor, and

wherein a second terminal of the first switch is electrically connected to the first power supply circuit; and

a second switch,

wherein a first terminal of the second switch electrically connected to the other of the source terminal and the drain terminal of the second transistor, and

wherein a second terminal of the second switch electrically connected to the second power supply circuit.

10. The semiconductor device according to claim 9,

wherein the first switch is a third transistor, and

wherein the second switch is a fourth transistor.

11. The semiconductor device according to claim 8,

wherein the signal holding portion comprises a third transistor and a second capacitor.

12. The semiconductor device according to claim 8,

wherein the word line is negatively charged.

13. The semiconductor device according to claim 8, wherein the first transistor and the second transistor each comprise an oxide semiconductor.

14. An electronic device comprising the semiconductor device according to claim 8, wherein the electronic device is selected from the group consisting of a liquid crystal display device, an EL display device, a television receiver, and a cellular phone.