System and Method for Performing Audio Processing Operations by Storing Information Within Multiple Memories

• US 20110196517A1
• Filed: 02/06/2010
• Published: 08/11/2011
• Est. Priority Date: 02/06/2010
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Lindahl, Aram
• Granted Patent: US 8,682,460 B2
• Time in Patent Office: Days
• US Class Current: 700/94
• CPC Class Codes: G10H 1/46 Volume control
• CPC Class Codes: G10H 2250/035 Crossfade, i.e. time domain amplitude envelope control of the transition between musical sounds or melodies, obtained for musical purposes, e.g. for ADSR tone generation, articulations, medley, remix audio mixers H04H60/04
• CPC Class Codes: G11B 2020/00014 the compressed signal being an audio signal
• CPC Class Codes: G11B 2020/10638 First-in-first-out memories [FIFO] buffers
• CPC Class Codes: G11B 2020/10759 content data
• CPC Class Codes: G11B 2220/2516 Hard disks
• CPC Class Codes: G11B 2220/61 wherein solid state memory is used for storing A/V content storing computer data in solid state memories G06F
• CPC Class Codes: G11B 27/038 Cross-faders therefor

Abstract

Systems, methods, and devices are provided for performing audio processing operations, such as crossfading between two audio streams, by storing information on multiple memories. In one example, such a method may include storing a first portion of information associated with an audio processing operation on a first memory. A second memory may be activated, upon which a second portion of the information associated with the audio processing operation may be stored. The audio processing operation may be performed using a processor with the information stored on the first memory and the second memory. When the audio processing operation has completed, the second memory may be deactivated.

Claims

1. A method comprising:

storing a first portion of information associated with an audio processing operation on a first memory;

activating a second memory;

storing a second portion of the information associated with the audio processing operation on the second memory;

performing the audio processing operation using a processor based at least in part on the information stored on the first memory and the second memory; and

deactivating the second memory.

2. The method of claim 1, wherein the second memory is activated in response to a user-input stimulus.

3. The method of claim 1, wherein the second memory is activated in response to an expected termination of an audio stream.

4. The method of claim 1, wherein activating the second memory comprises supplying power to the second memory and wherein deactivating the second memory comprises reducing the power supplied to the second memory.

5. The method of claim 1, wherein activating the second memory comprises activating a memory device integrated into a semiconductor device that includes the first memory and a processor.

6. The method of claim 1, wherein the audio processing operation comprises crossfading, audio equalization, audio buffering, mixing sound effects, or decoding audio encoded with an audio codec too large to store on the first memory, or any combination thereof.

7. An electronic device comprising:

a central processing unit having internal memory of a first type; and

additional memory of a second type different than the first type, wherein the additional memory is configured to remain deactivated except when an audio processing operation that involves more information storage than would be available on the first memory is expected to take place.

8. The electronic device of claim 7, wherein the central processing unit is configured to cause the additional memory to become activated prior to a crossfading operation and to become deactivated after the crossfading operation.

9. The electronic device of claim 7, wherein the internal memory comprises static random access memory and the additional memory comprises synchronous dynamic random access memory.

10. The electronic device of claim 7, wherein the internal memory is configured to consume less power per unit of storage than the external memory.

11. The electronic device of claim 7, wherein the second memory is configured to remain deactivated except when the audio processing operation is expected to take place, wherein the audio processing operation is expected to take place when the electronic device determines that a first audio stream is about to end and a second audio stream is about to begin.

12. The electronic device of claim 11, wherein the first audio stream is about to end and the second audio stream is about to begin when less than a threshold amount of playback time for the first audio stream remains.

13. The electronic device of claim 11, wherein the first audio stream is about to end and the second audio stream is about to begin when a user interface of the electronic device is being navigated.

14. A system comprising:

an audio accelerator configured to concurrently decode a first audio stream and a second audio stream by decoding a portion of the first audio stream when a first audio state is loaded onto the audio accelerator and to decode a portion of the second audio stream when a second audio state is loaded onto the audio accelerator;

a first memory configured to store the first audio state while the portion of the first audio stream is decoded by the audio accelerator and to store the second audio state while the portion of the second audio stream is decoded by the audio accelerator, while the audio accelerator concurrently decodes the first audio stream and the second audio stream; and

a second memory configured to store the first audio state while the portion of the second audio stream is decoded by the audio accelerator and to store the second audio state while the portion of the first audio stream is decoded by the audio accelerator, while the audio accelerator concurrently decodes the first audio stream and the second audio stream.

15. The system of claim 14, wherein the audio accelerator is configured to decode the portion of the first audio stream when the first audio state is loaded onto the audio accelerator from the first memory, wherein the first memory is configured to obtain the first audio state from the second memory.

16. The system of claim 14, wherein the audio accelerator is configured, after decoding the portion of the first audio stream, to halt and to save the first audio state to the first memory.

17. The system of claim 14, wherein the first memory comprises a primary memory buffer associated with information provided to and received from the audio accelerator.

18. The system of claim 14, wherein the second memory is configured to remain deactivated unless the audio accelerator is about to begin concurrently decoding the first audio stream and the second audio stream, has recently finished concurrently decoding the first audio stream and the second audio stream, or is concurrently decoding the first audio stream and the second audio stream.

19. A method comprising:

decoding a portion of a first audio stream based at least in part on a first audio state, wherein a first memory stores the first audio state while the portion of the first audio stream is being decoded;

after the portion of the first audio stream has been decoded, copying the first audio state from the first memory to a second memory;

decoding a portion of a second audio stream based at least in part on a second audio state, wherein the first memory stores the second audio state, but not the first audio state, while the portion of the second audio stream is decoded;

after the portion of the first audio stream has been decoded, copying the second audio state from the first memory to the second memory and copying the first audio state from the second memory to the first memory; and

decoding another portion of the first audio stream based at least in part on the first audio state, wherein the first memory stores the first audio state, but not the second audio state, while the portion of the first audio stream is being decoded.

20. The method of claim 19, wherein the portion of the first audio stream, the portion of the second audio stream, and the other portion of the first audio stream are decoded using an audio accelerator.

21. The method of claim 20, comprising, after the portion of the first audio stream has been decoded, saving the first audio state from the audio accelerator onto the first memory and, after the portion of the second audio stream has been decoded, saving the second audio state from the audio accelerator onto the first memory.

22. The method of claim 20, comprising loading the first audio state into the audio accelerator from the first memory before decoding the portion of the first audio stream and before decoding the other portion of the first audio stream and loading the second audio state into the audio accelerator from the first memory before decoding the portion of the second audio stream.

23. An electronic device comprising:

a central processing unit;

internal memory, wherein the internal memory is configured to supply all memory used by the electronic device when the electronic device is playing back only one audio stream; and

an additional memory configured to be activated when the electronic device is expected to concurrently play back more than one audio stream and to be deactivated when the electronic device is not expected to concurrently play back more than one audio stream.

24. The electronic device of claim 23, wherein the electronic device is expected to concurrently play back more than one audio stream when a first audio stream has less than a threshold amount of playback time remaining.

25. The electronic device of claim 23, wherein the electronic device is expected to concurrently play back more than one audio stream when a user interface of the electronic device is being navigated.