LIQUID CRYSTAL DISPLAY DEVICE

• US 20110198595A1
• Filed: 04/26/2011
• Published: 08/18/2011
• Est. Priority Date: 07/20/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei
• Granted Patent: US 8,896,778 B2
• Time in Patent Office: Days
• US Class Current: 257/57
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

It is an object to provide a liquid crystal display device including a thin film transistor with high electric characteristics and high reliability. As for a liquid crystal display device including an inverted staggered thin film transistor of a channel stop type, the inverted staggered thin film transistor includes a gate electrode, a gate insulating film over the gate electrode, a microcrystalline semiconductor film including a channel formation region over the gate insulating film, a buffer layer over the microcrystalline semiconductor film, and a channel protective layer which is formed over the buffer layer so as to overlap with the channel formation region of the microcrystalline semiconductor film.

Claims

1. A semiconductor device comprising:

a gate electrode;

a gate insulating film formed over the gate electrode;

a microcrystalline semiconductor film including a channel formation region formed over the gate insulating film;

a channel protective layer which is formed over the channel formation region of the microcrystalline semiconductor film;

a source region and a drain region formed over the channel protective layer; and

a source electrode and a drain electrode formed over the source region and the drain region,

an insulating film formed over the channel protective layer, the source electrode, and the drain electrode,

wherein end portions of the microcrystalline semiconductor film which is formed to overlap with the gate electrode are positioned more inwardly than end portions of the gate electrode.

2. The semiconductor device according to claim 1, further comprising a pixel electrode which is electrically connected to the source electrode or the drain electrode.

3. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film.

4. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing nitrogen.

5. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing hydrogen.

6. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine.

7. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing nitrogen, carbon, and oxygen at a total concentration of greater than or equal to 1×

10²⁰ atoms/cm³ and less than or equal to 15×

10²⁰ atoms/cm³.

8. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the source region and the drain region are formed over the buffer layer.

9. The semiconductor device according to claim 1, wherein the source and drain regions extend beyond edges of the source and drain electrodes,

wherein a distance between edges of the source and drain regions facing each other is shorter than a distance between the edges of the source and drain electrodes facing each other.

10. The semiconductor device according to claim 1, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer has a thickness within a range from 10 nm to 50 nm.

11. A semiconductor device comprising:

a gate electrode;

a gate insulating film formed over the gate electrode;

a microcrystalline semiconductor film including a channel formation region formed over the gate insulating film;

a channel protective layer which is formed over the channel formation region of the microcrystalline semiconductor film;

a source region and a drain region formed over the channel protective layer;

a source electrode and a drain electrode formed over the source region and the drain region; and

an insulating film formed over the channel protective layer, the source electrode, and the drain electrode,

wherein the source and drain regions extend beyond edges of the source and drain electrodes, and

wherein a distance between edges of the source and drain regions facing each other is shorter than a distance between the edges of the source and drain electrodes facing each other.

12. The semiconductor device according to claim 11, further comprising a pixel electrode formed over the gate insulating film, wherein the pixel electrode is electrically connected to the source electrode or the drain electrode.

13. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film, wherein the buffer layer is formed using an amorphous semiconductor film.

14. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing nitrogen.

15. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing hydrogen.

16. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine.

17. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer is formed using an amorphous semiconductor film containing nitrogen, carbon, and oxygen at a total concentration of greater than or equal to 1×

10²⁰ atoms/cm³ and less than or equal to 15×

10²⁰ atoms/cm³.

18. The semiconductor device according to claim 11, wherein end portions of the microcrystalline semiconductor film which is formed to overlap with the gate electrode are positioned more inwardly than end portions of the gate electrode.

19. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the source region and the drain region are formed over the buffer layer.

20. The semiconductor device according to claim 11, further comprising a buffer layer formed over the microcrystalline semiconductor film,

wherein the buffer layer has a thickness within a range from 10 nm to 50 nm.