DISPLAY DEVICE AND DRIVING METHOD

• US 20110199364A1
• Filed: 02/08/2011
• Published: 08/18/2011
• Est. Priority Date: 02/12/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun, Yamazaki, Shunpei
• Granted Patent: US 9,704,446 B2
• Time in Patent Office: Days
• US Class Current: 345/212
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0214 with crosstalk due to leakage current of pixel switch in active matrix panels
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

An object is to reduce power consumption of a display device and to suppress deterioration of display quality. As a transistor provided for each pixel, a transistor including an oxide semiconductor layer is used. Note that off-state current of the transistor can be decreased when the oxide semiconductor layer is highly purified. Therefore, variation in the value of a data signal due to the off-state current of the transistor can be suppressed. That is, display deterioration (change) which occurs when writing frequency of the data signal to the pixel including the transistor is reduced (when a break period is lengthened) can be suppressed. In addition, flickers in display which generates when the frequency of an alternating-current driving signal supplied to a signal line in the break period is reduced can be suppressed.

Claims

1. A display device comprising:

a signal line to which a data signal is configured to be supplied in a scanning period and an alternating-current driving signal having a lower frequency than the data signal is configured to be supplied in a break period which follows the scanning period and is longer than the scanning period;

a scan line to which a selection signal is configured to be supplied in one horizontal scanning period included in the scanning period and a non-selection signal is configured to be supplied in periods other than the one horizontal scanning period; and

a transistor comprising all oxide semiconductor layer, and having a gate electrically connected to the scan line and one of a source and a drain electrically connected to the signal line.

2. The display device according to claim 1, wherein one frame period consists of the scanning period and the break period.

3. The display device according to claim 1, further comprising:

a signal line driver circuit configured to control a potential of the signal line; and

a controller configured to output the data signal or the driving signal to the signal line driver circuit selectively,

wherein the controller comprises;

a data signal generation circuit configured to generate the data signal;

a driving signal generation circuit configured to generate the driving signal; and

a switch configured to select, as an output signal of the controller, the data signal in the scanning period and the driving signal in the break period.

4. The display device according to claim 3,

wherein the controller comprises:

a reference clock signal generation circuit configured to generate a first clock signal whose frequency is the same as that of the data signal;

a frequency dividing circuit which divides the first clock signal to generate a second clock signal whose frequency is the same as that of the driving signal; and

a clock signal selection switch configured to select, as a clock signal used in the signal line driver circuit, the first clock signal in the scanning period and the second clock signal in the break period.

5. The display device according to claim 1, wherein variation in voltage of the driving signal is within a voltage variation range of the data signal.

6. The display device according to claim 1, further comprising:

a capacitor having one terminal electrically connected to the other of the source and the drain of the transistor, and the other terminal electrically connected to a common potential line; and

a liquid crystal element having one terminal electrically connected to the other of the source and the drain of the transistor and the one terminal of the capacitor, and the other terminal electrically connected to the common potential line,

wherein a potential of the common potential line becomes a driving signal for the common potential line having an opposite polarity to the data signal in the scanning period, and becomes a signal having a fixed potential in the break period.

7. The display device according to claim 1, further comprising:

a capacitor having one terminal electrically connected to the other of the source and the drain of the transistor, and the other terminal electrically connected to a wiring to which a potential of a common potential line is supplied; and

a liquid crystal element having one terminal electrically connected to the other of the source and the drain of the transistor and the one terminal of the capacitor, and the other terminal electrically connected to the wiring to which the potential of the common potential line is supplied,

wherein the potential of the common potential line becomes a first driving signal for the common potential line having an opposite polarity to the data signal in the scanning period, and becomes a second driving signal for the common potential line having the same polarity as the driving signal in the break period.

8. The display device according to claim 7, wherein the driving signal and the second driving signal for the common potential line is the same signal.

9. A method for driving a display device comprising the steps of:

supplying a data signal to a signal line in a scanning period; and

supplying an alternating-current driving signal to the signal line in a break period,

wherein the display device comprises the signal line and a transistor comprising an oxide semiconductor layer, and having one of a source and a drain electrically connected to the signal line,

wherein the break period follows the scanning period,

wherein the break period is longer than the scanning period, and

wherein the alternating-current driving signal has a lower frequency than the data signal.

10. The method for driving a display device according to claim 9, further comprising the steps of:

supplying a selection signal to a scan line in one horizontal scanning period included in the scanning period; and

supplying a non-selection signal to the scan line in periods other than the one horizontal scanning period.

11. The method for driving a display device according to claim 9, wherein variation in voltage of the alternating-current driving signal is within a voltage variation range of the data signal.

12. The method for driving a display device according to claim 9, further comprising the steps of:

supplying a common potential having an opposite polarity to the data signal to a common potential line in the scanning period; and

supplying a signal having a fixed potential to the common potential line in the break period,

wherein the common potential line is electrically connected to one terminal of a liquid crystal element and one terminal of a capacitor, and

wherein the other terminal of the liquid crystal element and the other terminal of the capacitor are electrically connected to the other one of the source and the drain.

13. The method for driving a display device according to claim 9, further comprising the steps of:

supplying a first common potential having an opposite polarity to the data signal to a common potential line in the scanning period; and

supplying a second common potential having the same polarity as the driving signal to the common potential line in the break period,

wherein the common potential line is electrically connected to one terminal of a liquid crystal element and one terminal of a capacitor, and

wherein the other terminal of the liquid crystal element and the other terminal of the capacitor are electrically connected to the other one of the source and the drain.