Reducing Susceptibility to Electrostatic Discharge Damage during Die-To-Die Bonding for 3-D Packaged Integrated Circuits

• US 20110204504A1
• Filed: 02/23/2010
• Published: 08/25/2011
• Est. Priority Date: 02/23/2010
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Chandrasekaran, Arvind, Henderson, Brian Matthew
• Granted Patent: US 8,354,300 B2
• Time in Patent Office: Days
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/1403 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/14133 with a staggered arrangement, e.g. depopulated array
• CPC Class Codes: H01L 2224/14135 Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
• CPC Class Codes: H01L 2224/14136 Covering only the central area of the surface to be connected, i.e. central arrangements
• CPC Class Codes: H01L 2224/14177 Combinations of arrays with different layouts
• CPC Class Codes: H01L 2224/14179 Corner adaptations, i.e. disposition of the bump connectors at the corners of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/17517 including bump connectors providing primarily mechanical support
• CPC Class Codes: H01L 2224/81194 Lateral distribution of the bump connectors
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2224/81986 Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 24/14 of a plurality of bump connectors
• CPC Class Codes: H01L 24/17 of a plurality of bump connectors
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3511 : Warping

Abstract

Mitigating electrostatic discharge damage when fabricating a 3-D integrated circuit package, wherein in one embodiment when a second tier die is placed in contact with a first tier die, conductive bumps near the perimeter of the second tier die that are electrically coupled to the substrate of the second tier die make contact with corresponding conductive bumps on the first tier die that are electrically coupled to the substrate of first tier die before other signal conductive bumps and power conductive bumps on the second tier and first tier dice make electrical contact.

Claims

1. A method comprising:

warping a first tier die, the first tier die having a substrate, a set of signal conductive bumps and power conductive bumps not electrically connected to the first tier die substrate, and a set of substrate conductive bumps each electrically connected to the first tier die substrate; and

placing a second tier die in electrical contact with the first tier die;

the second tier die having a substrate, a set of signal conductive bumps and power conductive bumps not electrically connected to the second tier die substrate, and a set of substrate conductive bumps each electrically connected to the second tier die substrate;

wherein when placing the second tier die in contact with the first tier die, the second tier die set of substrate conductive bumps makes contact with the first tier die set of substrate conductive bumps before the second tier die set of signal conductive bumps and power conductive bumps makes contact with the first tier die set of signal conductive bumps and power conductive bumps.

2. The method as set forth in claim 1, the first tier die comprising a second set of substrate conductive bumps each electrically connected to the first tier die substrate, and the second tier die comprising a second set of substrate conductive bumps each electrically connected to the second tier die substrate, wherein when placing the second tier die in contact with the first tier die, the second tier die set of signal conductive bumps and power conductive bumps makes contact with the first tier die set of signal conductive bumps and power conductive bumps before the second tier die second set of substrate conductive bumps makes contact with the first tier die second set of substrate conductive bumps.

3. The method as set forth in claim 1, the second tier die having a surface with a perimeter, wherein the second tier die substrate conductive bumps are formed in an outer zone of the second tier die surface, wherein the outer zone contains the perimeter.

4. The method as set forth in claim 3, wherein the second tier die signal conductive bumps and power conductive bumps are formed in an inner zone of the second tier die surface, wherein the outer zone surrounds the inner zone.

5. The method as set forth in claim 1, further comprising sharing electronic charge between the first tier die substrate and the second tier die substrate by way of the first tier die set of substrate conductive bumps and the second tier die set of substrate conductive bumps.

6. The method as set forth in claim 1, the second tier die having a surface with a perimeter, wherein the second tier die substrate conductive bumps are formed in an inner zone of the second tier die surface, where the inner zone does not contain any of the perimeter.

7. The method as set forth in claim 6, wherein the second tier die signal conductive bumps and power conductive bumps are formed in an outer zone of the second tier die surface, wherein the outer zone contains the perimeter.

8. A system comprising an integrated circuit package comprising:

a first die comprising a first substrate and a first surface, the first surface having a perimeter and comprising;

a first outer zone of conductive bumps, the first outer zone containing the perimeter and having an inner boundary, wherein at least some of the first outer zone of conductive bumps are electrically coupled to the first substrate and none are signal conductive bumps or power conductive bumps;

a first intermediate zone contiguous and having an outer boundary coincident with the inner boundary of the first outer zone, having no signal conductive bumps or power conductive bumps, having an inner boundary;

a first inner zone of conductive bumps, the first inner zone contiguous and having a boundary coincident with the inner boundary of the first intermediate zone;

wherein the union of the first outer zone, the first intermediate zone, and the first inner zone comprises the first surface; and

a second die comprising a second substrate and a second surface, the second surface comprising;

a second outer zone of conductive bumps corresponding to the first outer zone of conductive bumps, wherein at least some of the second outer zone of conductive bumps are electrically coupled to the second substrate and none are signal conductive bumps or power conductive bumps;

a second intermediate zone corresponding to the first intermediate zone and not having signal conductive bumps or power conductive bumps; and

a second inner zone of conductive bumps corresponding to the first inner zone of conductive bumps;

wherein the conductive bumps in the first outer zone are electrically coupled to their corresponding conductive bumps in the second outer zone, and the conductive bumps in the first inner zone are electrically coupled to their corresponding conductive bumps in the second inner zone.

9. The integrated circuit package as set forth in claim 8, wherein the first and second outer zones of conductive bumps are configured to come into contact with each other before the first and second inner zones of conductive bumps come into contact with each other as the first and second dice are placed into contact with each other.

10. The integrated circuit package as set forth in claim 8, wherein each of the conductive bumps in the first outer zone are electrically coupled to the first substrate, and each of the conductive bumps in the second outer zone are electrically coupled to the second substrate.

11. The integrated circuit package as set forth in claim 8, the first intermediate zone comprising conductive bumps electrically isolated from the first die.

12. The system as set forth in claim 8, further comprising a device selected from the group consisting of a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer;

wherein the integrated circuit package is integrated into the device.

13. A system comprising an integrated circuit package comprising:

a first die comprising a first substrate and a first surface, the first surface having a perimeter and comprising;

a first outer zone of conductive bumps, the first outer zone containing the perimeter and having an inner boundary;

a first intermediate zone contiguous and having an outer boundary coincident with the inner boundary of the first outer zone, having no signal conductive bumps or power conductive bumps, and having an inner boundary;

a first inner zone contiguous and having an outer boundary coincident with the inner boundary of the first intermediate zone, wherein at least some of the first inner zone of conductive bumps are electrically coupled to the first substrate and none are signal conductive bumps or power conductive bumps;

wherein the union of the first outer zone, the first intermediate zone, and the first inner zone comprises the first surface; and

a second die comprising a second substrate and a second surface, the second surface comprising;

a second outer zone of conductive bumps corresponding to the first outer zone of conductive bumps;

a second intermediate zone corresponding to the first intermediate zone and not having signal conductive bumps or power conductive bumps;

and a second inner zone of conductive bumps corresponding to the first inner zone of conductive bumps wherein at least some of the second inner zone of conductive bumps are electrically coupled to the second substrate and none are signal conductive bumps or power conductive bumps;

wherein the conductive bumps in the first outer zone are electrically coupled to their corresponding conductive bumps in the second outer zone, the conductive bumps in the first inner zone are electrically coupled to their corresponding conductive bumps in the second inner zone.

14. The integrated circuit package as set forth in claim 13, wherein each of the conductive bumps in the first inner zone are electrically coupled to the first substrate, and each of the conductive bumps in the second inner zone are electrically coupled to the second substrate.

15. The integrated circuit package as set forth in claim 13, the first intermediate zone comprising conductive bumps electrically isolated from the first die.

16. The system as set forth in claim 13, further comprising a device selected from the group consisting of a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer;

wherein the integrated circuit package is integrated into the device.

17. A method comprising:

means for warping a first tier die, the first tier die having a substrate, a set of signal conductive bumps and power conductive bumps not electrically connected to the first tier die substrate, and a set of substrate conductive bumps each electrically connected to the first tier die substrate; and

means for placing a second tier die in electrical contact with the first tier die;

the second tier die having a substrate, a set of signal conductive bumps and power conductive bumps not electrically connected to the second tier die substrate, and a set of substrate conductive bumps each electrically connected to the second tier die substrate;

wherein when placing the second tier die in contact with the first tier die, the second tier die set of substrate conductive bumps makes contact with the first tier die set of substrate conductive bumps before the second tier die set of signal conductive bumps and power conductive bumps makes contact with the first tier die set of signal conductive bumps and power conductive bumps.

18. The method as set forth in claim 17, the first tier die comprising a second set of substrate conductive bumps each electrically connected to the first tier die substrate, and the second tier die comprising a second set of substrate conductive bumps each electrically connected to the second tier die substrate, wherein when placing the second tier die in contact with the first tier die, the second tier die set of signal conductive bumps and power conductive bumps makes contact with the first tier die set of signal conductive bumps and power conductive bumps before the second tier die second set of substrate conductive bumps makes contact with the first tier die second set of substrate conductive bumps.

19. The method as set forth in claim 17, the second tier die having a surface with a perimeter, wherein the second tier die substrate conductive bumps are formed in an outer zone of the second tier die surface, wherein the outer zone contains the perimeter.

20. The method as set forth in claim 19, wherein the second tier die signal conductive bumps and power conductive bumps are formed in an inner zone of the second tier die surface, wherein the outer zone surrounds the inner zone.

21. The method as set forth in claim 17, further comprising means for sharing electronic charge between the first tier die substrate and the second tier die substrate by way of the first tier die set of substrate conductive bumps and the second tier die set of substrate conductive bumps.

22. The method as set forth in claim 17, the second tier die having a surface with a perimeter, wherein the second tier die substrate conductive bumps are formed in an inner zone of the second tier die surface, where the inner zone does not contain any of the perimeter.

23. The method as set forth in claim 22, wherein the second tier die signal conductive bumps and power conductive bumps are formed in an outer zone of the second tier die surface, wherein the outer zone contains the perimeter.

24. A system comprising an integrated circuit package comprising:

a first die comprising a first substrate and a first surface, the first surface having a perimeter and comprising;

a first outer zone of conductive bumps, the first outer zone containing the perimeter and having an inner boundary;

means for coupling at least some of the first outer zone of conductive bumps to the first substrate, wherein none are signal conductive bumps or power conductive bumps;

a first intermediate zone contiguous and having an outer boundary coincident with the inner boundary of the first outer zone, having no signal conductive bumps or power conductive bumps, having an inner boundary;

a first inner zone of conductive bumps, the first inner zone contiguous and having a boundary coincident with the inner boundary of the first intermediate zone;

wherein the union of the first outer zone, the first intermediate zone, and the first inner zone comprises the first surface;

a second die comprising a second substrate and a second surface, the second surface comprising;

a second outer zone of conductive bumps corresponding to the first outer zone of conductive bumps;

means for electrically coupling at least some of the second outer zone of conductive bumps to the second substrate, wherein none are signal conductive bumps or power conductive bumps;

a second intermediate zone corresponding to the first intermediate zone and not having signal conductive bumps or power conductive bumps; and

a second inner zone of conductive bumps corresponding to the first inner zone of conductive bumps;

means for electrically coupling the conductive bumps in the first outer zone to their corresponding conductive bumps in the second outer zone; and

means for electrically coupling the conductive bumps in the first inner zone to their corresponding conductive bumps in the second inner zone.

25. The integrated circuit package as set forth in claim 24, wherein the first and second outer zones of conductive bumps are configured to come into contact with each other before the first and second inner zones of conductive bumps come into contact with each other as the first and second dice are placed into contact with each other.

26. The integrated circuit package as set forth in claim 24, further comprising means for electrically coupling each of the conductive bumps in the first outer zone to the first substrate;

and means for electrically coupling each of the conductive bumps in the second outer zone to the second substrate.

27. The integrated circuit package as set forth in claim 24, the first intermediate zone comprising conductive bumps electrically isolated from the first die.

28. The system as set forth in claim 24, further comprising a device selected from the group consisting of a set top box, a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer;

wherein the integrated circuit package is integrated into the device.