TRANSISTOR AND MANUFACTURING METHOD OF THE SAME

• US 20110207269A1
• Filed: 02/14/2011
• Published: 08/25/2011
• Est. Priority Date: 02/19/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: NAKAYAMA, Hitoshi, SHIMADA, Daigo, TSUBUKU, Masashi, SASAGAWA, Shinya
• Granted Patent: US 8,597,992 B2
• Time in Patent Office: Days
• US Class Current: 438/158
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A transistor is manufactured by a method including: forming a first wiring layer; forming a first insulating film to cover the first wiring layer; forming a semiconductor layer over the first insulating film; forming a conductive film over the semiconductor layer; and performing at least two steps of etching on the conductive film to form second wiring layers which are apart from each other, wherein the two steps of etching include at least a first etching process performed under the condition that the etching rate for the conductive film is higher than the etching rate for the semiconductor layer, and a second etching process performed under the condition that the etching rates for the conductive film and the semiconductor layer are higher than those of the first etching process.

Claims

1. A method of manufacturing a transistor, the method comprising:

forming a first wiring layer;

forming a first insulating film to cover the first wiring layer;

forming a semiconductor layer over the first insulating film;

forming a conductive film over the semiconductor layer; and

patterning the conductive film to form second wiring layers which are apart from each other by at least a first etching process and a second etching process after the first etching process,

wherein the first etching process is performed in a first condition that a first etching rate for the conductive film is higher than a second etching rate for the semiconductor layer, and

wherein the second etching process is performed in a second condition that a third etching rate for the conductive film is higher than the first etching rate, and a fourth etching rate for the semiconductor layer is higher than the second etching rate.

2. The method of manufacturing a transistor according to claim 1, wherein the first etching process is performed using SF₆ and the second etching process is performed using a mixed gas of BCl₃ and Cl₂.

3. The method of manufacturing a transistor according to claim 1, wherein the semiconductor layer includes an oxide semiconductor.

4. The method of manufacturing a transistor according to claim 1, wherein the first etching process and the second etching process are performed by dry etching.

5. The method of manufacturing a transistor according to claim 1,

wherein a first film thickness of a first portion of the semiconductor layer, which is not overlapped with the second wiring layers, is thinner than a second film thickness of a second portion of the semiconductor layer, which is overlapped with one of the second wiring layers, and

wherein a difference between the first film thickness and the second film thickness is above 0 nm and equal to or below 5 nm.

6. The method of manufacturing a transistor according to claim 1, wherein a taper angle of the second wiring layer is equal to or above 15 degrees and equal to or below 45 degrees.

7. A method of manufacturing a transistor, the method comprising:

forming a first wiring layer;

forming a first insulating film to cover the first wiring layer;

forming a conductive film over the first insulating film;

patterning the conductive film to form second wiring layers which are apart from each other by at least a first etching process and a second etching process; and

forming a semiconductor layer over the first insulating film and the second wiring layers,

wherein the first etching process is performed in a first condition that a first etching rate for the conductive film is higher than a second etching rate for the first insulating film, and

wherein the second etching process is performed in a second condition that a third etching rate for the conductive film is higher than the first etching rate, and a fourth etching rate for the first insulating film is higher than the second etching rate.

8. The method of manufacturing a transistor according to claim 7, wherein the first etching process is performed using SF₆ and the second etching process is performed using a mixed gas of BCl₃ and Cl₂.

9. The method of manufacturing a transistor according to claim 7, wherein the semiconductor layer includes an oxide semiconductor.

10. The method of manufacturing a transistor according to claim 7, wherein the first etching process and the second etching process are performed by dry etching.

11. The method of manufacturing a transistor according to claim 7,

wherein a first film thickness of a first portion of the first insulating film, which is not overlapped with the second wiring layers, is thinner than a second film thickness of a second portion of the first insulating film, which is overlapped with one of the second wiring layers, and

wherein a difference between the first film thickness and the second film thickness is above 0 nm and equal to or below 5 nm.

12. The method of manufacturing a transistor according to claim 7, wherein a taper angle of the second wiring layer is equal to or above 15 degrees and equal to or below 45 degrees.

13. A method of manufacturing a transistor, the method comprising:

forming a semiconductor layer;

forming a conductive film over the semiconductor layer;

patterning the conductive film to form first wiring layers which are apart from each other by at least a first etching process and a second etching process;

forming an insulating layer to cover the first wiring layers and the semiconductor layer; and

forming a second wiring layer over the insulating layer to overlap with the semiconductor layer,

wherein the first etching process is performed in a first condition that a first etching rate for the conductive film is higher than a second etching rate for the semiconductor layer, and

wherein the second etching process is performed in a second condition that a third etching rate for the conductive film is higher than the first etching rate, and a fourth etching rate for the semiconductor layer is higher than the second etching rate.

14. The method of manufacturing a transistor according to claim 13, wherein the first etching process is performed using SF₆ and the second etching process is performed using a mixed gas of BCl₃ and Cl₂.

15. The method of manufacturing a transistor according to claim 13, wherein the semiconductor layer includes an oxide semiconductor.

16. The method of manufacturing a transistor according to claim 13, wherein the first etching process and the second etching process are performed by dry etching.

17. The method of manufacturing a transistor according to claim 13,

wherein a first film thickness of a first portion of the semiconductor layer, which is not overlapped with the first wiring layers, is thinner than a second film thickness of a second portion of the semiconductor layer, which is overlapped with one of the first wiring layers, and

wherein a difference between the first film thickness and the second film thickness is above 0 nm and equal to or below 5 nm.

18. The method of manufacturing a transistor according to claim 13, wherein a taper angle of the first wiring layer is equal to or above 15 degrees and equal to or below 45 degrees.

19. A method of manufacturing a transistor, the method comprising:

forming a base insulating film;

forming a conductive film over the base insulating film;

patterning the conductive film to form first wiring layers which are apart from each other by at least a first etching process and a second etching process;

forming a semiconductor layer over the base insulating film and the first wiring layers;

forming an insulating layer to cover the base insulating film, the semiconductor layer and the first wiring layers; and

forming a second wiring layer over the insulating layer to overlap with the semiconductor layer,

wherein the first etching process is performed in a first condition that a first etching rate for the conductive film is higher than a second etching rate for the base insulating film, and

wherein the second etching process is performed in a second condition that a third etching rate for the conductive film is higher than the first etching rate, and a fourth etching rate for the base insulating film is higher than the second etching rate.

20. The method of manufacturing a transistor according to claim 19, wherein the first etching process is performed using SF₆ and the second etching process is performed using a mixed gas of BCl₃ and Cl₂.

21. The method of manufacturing a transistor according to claim 19, wherein the semiconductor layer includes an oxide semiconductor.

22. The method of manufacturing a transistor according to claim 19, wherein the first etching process and the second etching process are performed by dry etching.

23. The method of manufacturing a transistor according to claim 19,

wherein a first film thickness of a first portion of the base insulating film, which is not overlapped with the first wiring layers, is thinner than a second film thickness of a second portion of the base insulating film, which is overlapped with one of the first wiring layers, and

wherein a difference between the first film thickness and the second film thickness is above 0 nm and equal to or below 5 nm.

24. The method of manufacturing a transistor according to claim 19, wherein a taper angle of the first wiring layer is equal to or above 15 degrees and equal to or below 45 degrees.