Optoelectronic Component and Method for the Production Thereof

• US 20110210357A1
• Filed: 06/03/2009
• Published: 09/01/2011
• Est. Priority Date: 06/06/2008
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Ploessl, Andreas, Kaiser, Stephan
• Granted Patent: US 10,128,405 B2
• Time in Patent Office: Days
• US Class Current: 257/98
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/405 Reflective materials

Abstract

A method of producing an optoelectronic component, comprising the method steps: A) providing a growth substrate (1); B) growing at least one semiconductor layer (2) epitaxially, to produce an operationally active zone; C) applying a metallic mirror layer (3) to the semiconductor layer (2); D) applying at least one contact layer (8) for electronic contacting of the component; E) detaching the growth substrate (1) from the semiconductor layer (2), so exposing a surface of the semiconductor layer (2); and F) structuring the semiconductor layer (2) by means of an etching method from the side of the surface which was exposed in method step E).

Claims

1. A method of producing an opto electronic component, comprising the steps of:

A) providing a growth substrate;

B) growing at least one semiconductor layer epitaxially, to produce an operationally active zone;

C) applying a metallic mirror layer to the semiconductor layer;

D) applying at least one contact layer for electronic contacting of the component;

E) detaching the growth substrate from the semiconductor layer, so exposing a surface of the semiconductor layer; and

F) structuring the semiconductor layer by means of an etching method from the side of the surface which was exposed in method step E).

2. The method according to claim 1, wherein the metallic mirror layer is applied in method step C) to the unstructured semiconductor layer.

3. The method according to claim 1, wherein trenches are produced by the structuring in method step F), by means of which the semiconductor layer is subdivided into a plurality of sub-regions.

4. The method according to claim 1, wherein trenches are formed by the structuring in method step F), the cross-sections of which taper from the surface exposed in method step E) towards the mirror layer.

5. The method according to claim 1

which additionally comprises the following method steps between method steps C) and D);

G) applying a diffusion barrier layer to the mirror layer;

H) applying a passivation layer to the diffusion barrier layer; and

I) applying the layer sequence produced in method steps A) to H) to a carrier.

6. The method according to claim 5, wherein a carrier is used in method step I) which is produced by a method comprising the steps of:

I1) providing a carrier wafer,

I2) applying a barrier layer to the carrier wafer, and

I3) applying a bonding layer to the barrier layer.

7. The method according to claim 1, wherein the mirror layer from method step C) is structured by a further method step which falls between method steps C) and D).

8. The method according to claim 1, which, after method step F), comprises roughening the structured semiconductor layer as a further method step J1).

9. The method according to claim 8, which, after method step J1), comprises as a further method step J2) coating the roughened semiconductor layer with a top coat which is transmissive for visible radiation, UV radiation, IR radiation or a combination of these radiations.

10. The method according to claim 9, which, after method step J2), comprises structuring the top coat as a further method step J3).

11. The method according to claim 10, which, after method step J3), comprises as a further method step J4) applying an electrical contact to a sub-region of the semiconductor layer re-exposed by the structuring of the top coat.

12. An optoelectronic component, comprising:

a structured semiconductor layer;

a metallic mirror layer arranged on the semiconductor layer;

a diffusion barrier layer arranged on the metallic mirror layer; and

a passivation layer arranged on the diffusion barrier layer;

wherein the semiconductor layer comprises a mesa structure, the mesa trenches of which taper from the surface of the semiconductor layer towards the mirror layer.

13. The optoelectronic component according to claim 12, comprising:

a carrier wafer;

an electrical contacting layer arranged on the carrier wafer;

a barrier layer arranged on the contact layer;

a bonding layer arranged on the barrier layer; and

wherein the bonding layer is joined to the passivation layer.