Dummy Wafers in 3DIC Package Assemblies
First Claim
Patent Images
1. A package structure comprising:
- a first die;
a second die over and bonded to the first die, wherein the second die has a size smaller than a size of the first die; and
a dummy chip over and bonded to the first die, wherein the dummy chip comprises a portion encircling the second die, and wherein the dummy chip comprises a material selected from the group consisting essentially of silicon and a metal.
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Abstract
A package structure includes a first die, and a second die over and bonded to the first die. The second die has a size smaller than a size of the first die. A dummy chip is over and bonded onto the first die. The dummy chip includes a portion encircling the second die. The dummy chip includes a material selected from the group consisting essentially of silicon and a metal.
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Citations
20 Claims
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1. A package structure comprising:
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a first die; a second die over and bonded to the first die, wherein the second die has a size smaller than a size of the first die; and a dummy chip over and bonded to the first die, wherein the dummy chip comprises a portion encircling the second die, and wherein the dummy chip comprises a material selected from the group consisting essentially of silicon and a metal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A package structure comprising:
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an interposer die substantially free from integrated circuit devices formed therein; a first die over and bonded to the interposer die, wherein the first die has a horizontal size smaller than a horizontal size of the interposer die; and a dummy chip substantially free from integrated circuit devices over and bonded to the interposer die, wherein the dummy chip comprises a portion encircling the first die, and wherein the dummy chip comprises a material selected from the group consisting essentially of silicon and a metal. - View Dependent Claims (17, 18, 19, 20)
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Specification