Semiconductor device

• US 20110215481A1
• Filed: 05/12/2011
• Published: 09/08/2011
• Est. Priority Date: 08/09/2005
• Status: Abandoned Application

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Nagai, Noriyuki, Sakashita, Toshihiko
• Application Number:
  US13/067,152
• Publication Number:
  US 20110215481A1
• Time in Patent Office: Days
• US Class Current: 257/774
• CPC Class Codes: H01L 2224/023 Redistribution layers [RDL] for bonding areas
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05073 Single internal layer
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/48824 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48847 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/12 Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

In a semiconductor device, a pad metal has at least a portion located immediately under a probe region, and the portion is divided into a plurality of narrow metal layers each arranged in parallel with a traveling direction of a probe. Thus, it is possible to enhance surface flatness of the pad metal and to prevent a characteristic of a semiconductor device from deteriorating without complication in processing and increase in chip size.

Claims

1-18. -18. (canceled)

19. A semiconductor device comprising:

an electrode pad region having an electrode pad formed thereon and serving as an external terminal for proving;

an active region having an internal circuit formed therein;

a plurality of metal wires located under the electrode pad; and

a via for electrically connecting between the electrode pad and one of the metal wires,

wherein a slit is between the metal wires, the slit extends in a direction from the electrode pad region to the active region, and the via extends in a direction perpendicular to the slit.

20. The semiconductor device according to claim 19, wherein the electrode pad has a probe region, and the via is formed outside the probe region.

21. The semiconductor device according to claim 19, wherein an interlayer film is located on the metal wires, the electrode pad is located on the interlayer film, and the via penetrates through the interlayer film.

22. The semiconductor device according to claim 19, wherein a shield wire around the active region, and the shield wire extends in a direction perpendicular to the slit.

23. The semiconductor device according to claim 21, wherein the interlayer film is a SiN layer.

24. The semiconductor device according to claim 20, wherein the slit is formed in the portion under the probe region.

25. The semiconductor device according to claim 19, wherein the metal wires have a width of not larger than 20 μ

m.

26. The semiconductor device according to claim 19, wherein the metal wires are made of Cu.

27. The semiconductor device according to claim 19, wherein the electrode pad is made of Al.